From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 524 invoked by alias); 21 Jul 2010 18:59:07 -0000 Received: (qmail 508 invoked by uid 22791); 21 Jul 2010 18:59:06 -0000 X-SWARE-Spam-Status: No, hits=-2.2 required=5.0 tests=AWL,BAYES_00,TW_EG,TW_SX,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from e24smtp04.br.ibm.com (HELO e24smtp04.br.ibm.com) (32.104.18.25) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 21 Jul 2010 18:58:59 +0000 Received: from mailhub3.br.ibm.com (mailhub3.br.ibm.com [9.18.232.110]) by e24smtp04.br.ibm.com (8.14.4/8.13.1) with ESMTP id o6LIuZ90028348 for ; Wed, 21 Jul 2010 15:56:35 -0300 Received: from d24av01.br.ibm.com (d24av01.br.ibm.com [9.8.31.91]) by mailhub3.br.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id o6LJ3v8I2117710 for ; Wed, 21 Jul 2010 16:03:57 -0300 Received: from d24av01.br.ibm.com (loopback [127.0.0.1]) by d24av01.br.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id o6LIwfrV029950 for ; Wed, 21 Jul 2010 15:58:42 -0300 Received: from [9.8.13.240] ([9.8.13.240]) by d24av01.br.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id o6LIwfvn029942 for ; Wed, 21 Jul 2010 15:58:41 -0300 Subject: [RFA] Fix setting of VSX registers From: Thiago Jung Bauermann To: gdb-patches ml Content-Type: multipart/mixed; boundary="=-aNUEmc4C8P+kcGYXmJBY" Date: Wed, 21 Jul 2010 18:59:00 -0000 Message-ID: <1279738729.11022.23.camel@hactar> Mime-Version: 1.0 X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2010-07/txt/msg00333.txt.bz2 --=-aNUEmc4C8P+kcGYXmJBY Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Content-length: 1239 Hi, ppc-linux-nat.c:store_vsx_register fetches the VSX registers into a buffer, changes the value of the relevant register and then stores the buffer again with ptrace. The problem is, the function was "fetching" the VSX registers using PTRACE_SETVSXREGS instead of PTRACE_GETVSXREGS. Ouch. This patch fixes the typo, and also fixes the vsx-regs.exp testcase to use gdb_test instead of send_gdb (this also fixes some synchronization issues in the test), and updates the expect info reg output with the new v2_double member. gdbserver doesn't have this bug, the vsx-regs.exp test passes there (except for the core file tests which are unsupported in gdbserver). There are no regressions in the testsuite. Ok to commit? Ok for the branch too? -- []'s Thiago Jung Bauermann IBM Linux Technology Center 2010-07-20 Thiago Jung Bauermann gdb/ * ppc-linux-nat.c (store_vsx_register): Use PTRACE_GETVSXREGS to get VSX registers contents. gdb/testsuite/ * gdb.arch/vsx-regs.exp: Remove wrong comment about testing AltiVec registers. Update data sets with the new v2_double element in the VSX register union. Add vector_register3_vr data set for the AltiVec registers. Use gdb_test instead of send_gdb. --=-aNUEmc4C8P+kcGYXmJBY Content-Disposition: attachment; filename="vsx.diff" Content-Type: text/x-patch; name="vsx.diff"; charset="UTF-8" Content-Transfer-Encoding: 7bit Content-length: 4909 diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c index e8d96f6..18ddee7 100644 --- a/gdb/ppc-linux-nat.c +++ b/gdb/ppc-linux-nat.c @@ -877,7 +877,7 @@ store_vsx_register (const struct regcache *regcache, int tid, int regno) struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); int vsxregsize = register_size (gdbarch, tdep->ppc_vsr0_upper_regnum); - ret = ptrace (PTRACE_SETVSXREGS, tid, 0, ®s); + ret = ptrace (PTRACE_GETVSXREGS, tid, 0, ®s); if (ret < 0) { if (errno == EIO) diff --git a/gdb/testsuite/gdb.arch/vsx-regs.exp b/gdb/testsuite/gdb.arch/vsx-regs.exp index f310a6f..117ff25 100644 --- a/gdb/testsuite/gdb.arch/vsx-regs.exp +++ b/gdb/testsuite/gdb.arch/vsx-regs.exp @@ -14,8 +14,6 @@ # along with this program. If not, see . # -# Tests for Powerpc AltiVec register setting and fetching - if $tracelevel then { strace $tracelevel } @@ -66,11 +64,13 @@ if ![runto_main] then { # Data sets used throughout the test -set vector_register1 ".uint128 = 0x3ff4cccccccccccc0000000000000000, v4_float = .0x1, 0xf99999a0, 0x0, 0x0., v4_int32 = .0x3ff4cccc, 0xcccccccc, 0x0, 0x0., v8_int16 = .0x3ff4, 0xcccc, 0xcccc, 0xcccc, 0x0, 0x0, 0x0, 0x0., v16_int8 = .0x3f, 0xf4, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0.." +set vector_register1 ".uint128 = 0x3ff4cccccccccccc0000000000000000, v2_double = .0x1, 0x0., v4_float = .0x1, 0xf99999a0, 0x0, 0x0., v4_int32 = .0x3ff4cccc, 0xcccccccc, 0x0, 0x0., v8_int16 = .0x3ff4, 0xcccc, 0xcccc, 0xcccc, 0x0, 0x0, 0x0, 0x0., v16_int8 = .0x3f, 0xf4, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0.." + +set vector_register2 "uint128 = 0xdeadbeefdeadbeefdeadbeefdeadbeef, v2_double = .0x1, 0x1., v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0xdeadbeef, 0xdeadbeef, 0xdeadbeef, 0xdeadbeef., v8_int16 = .0xdead, 0xbeef, 0xdead, 0xbeef, 0xdead, 0xbeef, 0xdead, 0xbeef., v16_int8 = .0xde, 0xad, 0xbe, 0xef, 0xde, 0xad, 0xbe, 0xef, 0xde, 0xad, 0xbe, 0xef, 0xde, 0xad, 0xbe, 0xef.." -set vector_register2 "uint128 = 0xdeadbeefdeadbeefdeadbeefdeadbeef, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0xdeadbeef, 0xdeadbeef, 0xdeadbeef, 0xdeadbeef., v8_int16 = .0xdead, 0xbeef, 0xdead, 0xbeef, 0xdead, 0xbeef, 0xdead, 0xbeef., v16_int8 = .0xde, 0xad, 0xbe, 0xef, 0xde, 0xad, 0xbe, 0xef, 0xde, 0xad, 0xbe, 0xef, 0xde, 0xad, 0xbe, 0xef.." +set vector_register3 ".uint128 = 0x00000001000000010000000100000001, v2_double = .0x0, 0x0., v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1., v16_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.." -set vector_register3 ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1., v16_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.." +set vector_register3_vr ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1., v16_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.." set float_register ".raw 0xdeadbeefdeadbeef." @@ -78,7 +78,7 @@ set float_register ".raw 0xdeadbeefdeadbeef." # 1: Set F0~F31 registers and check if it reflects on VS0~VS31. for {set i 0} {$i < 32} {incr i 1} { - send_gdb "set \$f$i = 1\.3" + gdb_test "set \$f$i = 1\.3" "" "" } for {set i 0} {$i < 32} {incr i 1} { @@ -88,7 +88,7 @@ for {set i 0} {$i < 32} {incr i 1} { # 2: Set VS0~VS31 registers and check if it reflects on F0~F31. for {set i 0} {$i < 32} {incr i 1} { for {set j 0} {$j < 4} {incr j 1} { - send_gdb "set \$vs$i.v4_int32\[$j\] = 0xdeadbeef" + gdb_test "set \$vs$i.v4_int32\[$j\] = 0xdeadbeef" "" "" } } @@ -105,7 +105,7 @@ for {set i 0} {$i < 32} {incr i 1} { # 1: Set VR0~VR31 registers and check if it reflects on VS32~VS63. for {set i 0} {$i < 32} {incr i 1} { for {set j 0} {$j < 4} {incr j 1} { - send_gdb "set \$vr$i.v4_int32\[$j\] = 1" + gdb_test "set \$vr$i.v4_int32\[$j\] = 1" "" "" } } @@ -115,12 +115,12 @@ for {set i 32} {$i < 64} {incr i 1} { # 2: Set VS32~VS63 registers and check if it reflects on VR0~VR31. for {set i 32} {$i < 64} {incr i 1} { for {set j 0} {$j < 4} {incr j 1} { - send_gdb "set \$vs$i.v4_int32\[$j\] = 1" + gdb_test "set \$vs$i.v4_int32\[$j\] = 1" "" "" } } for {set i 0} {$i < 32} {incr i 1} { - gdb_test "info reg vr$i" "vr$i.*$vector_register3" "info reg vr$i" + gdb_test "info reg vr$i" "vr$i.*$vector_register3_vr" "info reg vr$i" } set escapedfilename [string_to_regexp ${objdir}/${subdir}/vsx-core.test] --=-aNUEmc4C8P+kcGYXmJBY--