From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30020 invoked by alias); 23 Mar 2009 14:45:14 -0000 Received: (qmail 29979 invoked by uid 22791); 23 Mar 2009 14:45:10 -0000 X-SWARE-Spam-Status: No, hits=-2.8 required=5.0 tests=AWL,BAYES_00,SPF_PASS X-Spam-Check-By: sourceware.org Received: from e24smtp04.br.ibm.com (HELO e24smtp04.br.ibm.com) (32.104.18.25) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 23 Mar 2009 14:45:05 +0000 Received: from mailhub1.br.ibm.com (mailhub1.br.ibm.com [9.18.232.109]) by e24smtp04.br.ibm.com (8.13.1/8.13.1) with ESMTP id n2NEfkSr002739 for ; Mon, 23 Mar 2009 11:41:46 -0300 Received: from d24av02.br.ibm.com (d24av02.br.ibm.com [9.18.232.47]) by mailhub1.br.ibm.com (8.13.8/8.13.8/NCO v9.2) with ESMTP id n2NEjHFo1536180 for ; Mon, 23 Mar 2009 11:45:18 -0300 Received: from d24av02.br.ibm.com (loopback [127.0.0.1]) by d24av02.br.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id n2NEixGk010800 for ; Mon, 23 Mar 2009 11:44:59 -0300 Received: from [9.8.1.68] ([9.8.1.68]) by d24av02.br.ibm.com (8.12.11.20060308/8.12.11) with ESMTP id n2NEixoj010790 for ; Mon, 23 Mar 2009 11:44:59 -0300 Subject: [RFA] Change AUXV bit checked to decide the size of the FPSCR From: Thiago Jung Bauermann To: gdb-patches ml Content-Type: text/plain Date: Mon, 23 Mar 2009 15:22:00 -0000 Message-Id: <1237819493.25721.38.camel@localhost.localdomain> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2009-03/txt/msg00490.txt.bz2 Hi, I recently found out that even though Power7 will support ISA 2.05, it will have the PPC_FEATURE_ARCH_2_06 bit set, but not the PPC_FEATURE_ARCH_2_05 bit (even though it will also support ISA 2.05). For this reason, I'm changing GDB to check for DFP to decide what is the size of the FPSCR (it changed from 32 bits to 64 bits with ISA 2.05 and newer). Since for now the only higher bits used are for Decimal Floating Point, I am changing the code to check the DFP bit in AUXV. Regression-tested in Linux on a Power6 machine, running the testsuite in both native and gdbserver configurations. Ok? -- []'s Thiago Jung Bauermann IBM Linux Technology Center 2009-03-23 Thiago Jung Bauermann gdb/ * ppc-linux-nat.c (PPC_FEATURE_ARCH_2_05): Remove #define. (PPC_FEATURE_HAS_DFP): New #define. (ppc_linux_read_description): Check for DFP feature instead of ISA 2.05 to decide on size of the FPSCR. gdbserver/ * linux-ppc-low.c (PPC_FEATURE_ARCH_2_05): Remove #define. (PPC_FEATURE_HAS_DFP): New #define. (ppc_arch_setup): Check for DFP feature instead of ISA 2.05 to decide on size of the FPSCR. diff --git a/gdb/gdbserver/linux-ppc-low.c b/gdb/gdbserver/linux-ppc-low.c index b184d5c..29ae832 100644 --- a/gdb/gdbserver/linux-ppc-low.c +++ b/gdb/gdbserver/linux-ppc-low.c @@ -28,7 +28,7 @@ #define PPC_FEATURE_HAS_VSX 0x00000080 #define PPC_FEATURE_HAS_ALTIVEC 0x10000000 #define PPC_FEATURE_HAS_SPE 0x00800000 -#define PPC_FEATURE_ARCH_2_05 0x00001000 +#define PPC_FEATURE_HAS_DFP 0x00000400 static unsigned long ppc_hwcap; @@ -274,14 +274,14 @@ ppc_arch_setup (void) ppc_get_hwcap (&ppc_hwcap); if (ppc_hwcap & PPC_FEATURE_HAS_VSX) { - if (ppc_hwcap & PPC_FEATURE_ARCH_2_05) + if (ppc_hwcap & PPC_FEATURE_HAS_DFP) init_registers_powerpc_isa205_vsx64l (); else init_registers_powerpc_vsx64l (); } else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC) { - if (ppc_hwcap & PPC_FEATURE_ARCH_2_05) + if (ppc_hwcap & PPC_FEATURE_HAS_DFP) init_registers_powerpc_isa205_altivec64l (); else init_registers_powerpc_altivec64l (); @@ -297,14 +297,14 @@ ppc_arch_setup (void) ppc_get_hwcap (&ppc_hwcap); if (ppc_hwcap & PPC_FEATURE_HAS_VSX) { - if (ppc_hwcap & PPC_FEATURE_ARCH_2_05) + if (ppc_hwcap & PPC_FEATURE_HAS_DFP) init_registers_powerpc_isa205_vsx32l (); else init_registers_powerpc_vsx32l (); } else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC) { - if (ppc_hwcap & PPC_FEATURE_ARCH_2_05) + if (ppc_hwcap & PPC_FEATURE_HAS_DFP) init_registers_powerpc_isa205_altivec32l (); else init_registers_powerpc_altivec32l (); diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c index 034201b..0c0f04c 100644 --- a/gdb/ppc-linux-nat.c +++ b/gdb/ppc-linux-nat.c @@ -63,8 +63,8 @@ #ifndef PPC_FEATURE_BOOKE #define PPC_FEATURE_BOOKE 0x00008000 #endif -#ifndef PPC_FEATURE_ARCH_2_05 -#define PPC_FEATURE_ARCH_2_05 0x00001000 /* ISA 2.05 */ +#ifndef PPC_FEATURE_HAS_DFP +#define PPC_FEATURE_HAS_DFP 0x00000400 /* Decimal Floating Point. */ #endif /* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a @@ -1290,7 +1290,7 @@ ppc_linux_read_description (struct target_ops *ops) perror_with_name (_("Unable to fetch AltiVec registers")); } - if (ppc_linux_get_hwcap () & PPC_FEATURE_ARCH_2_05) + if (ppc_linux_get_hwcap () & PPC_FEATURE_HAS_DFP) isa205 = 1; /* Check for 64-bit inferior process. This is the case when the host is