From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 12537 invoked by alias); 22 Aug 2008 22:32:22 -0000 Received: (qmail 12526 invoked by uid 22791); 22 Aug 2008 22:32:21 -0000 X-Spam-Check-By: sourceware.org Received: from igw2.br.ibm.com (HELO igw2.br.ibm.com) (32.104.18.25) by sourceware.org (qpsmtpd/0.31) with ESMTP; Fri, 22 Aug 2008 22:31:38 +0000 Received: from mailhub1.br.ibm.com (mailhub1 [9.18.232.109]) by igw2.br.ibm.com (Postfix) with ESMTP id 0A0F817F55F for ; Fri, 22 Aug 2008 19:17:11 -0300 (BRT) Received: from d24av02.br.ibm.com (d24av02.br.ibm.com [9.18.232.47]) by mailhub1.br.ibm.com (8.13.8/8.13.8/NCO v9.0) with ESMTP id m7MMVfhF2109472 for ; Fri, 22 Aug 2008 19:31:41 -0300 Received: from d24av02.br.ibm.com (loopback [127.0.0.1]) by d24av02.br.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id m7MMVZhd014884 for ; Fri, 22 Aug 2008 19:31:35 -0300 Received: from [9.8.6.166] ([9.8.6.166]) by d24av02.br.ibm.com (8.12.11.20060308/8.12.11) with ESMTP id m7MMVT2U014493 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Fri, 22 Aug 2008 19:31:33 -0300 Subject: Re: [PATCH-ppc 2/5] Add VSX support for core-files From: Luis Machado Reply-To: luisgpm@linux.vnet.ibm.com To: Ulrich Weigand Cc: gdb-patches@sourceware.org In-Reply-To: <200808212113.m7LLDXSL026347@d12av02.megacenter.de.ibm.com> References: <200808212113.m7LLDXSL026347@d12av02.megacenter.de.ibm.com> Content-Type: text/plain Date: Fri, 22 Aug 2008 22:32:00 -0000 Message-Id: <1219444267.28934.10.camel@gargoyle> Mime-Version: 1.0 X-Mailer: Evolution 2.12.1 Content-Transfer-Encoding: 7bit X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2008-08/txt/msg00591.txt.bz2 Hi, Attached is a patch that fixes the seen regression. OK? Thanks, Luis On Thu, 2008-08-21 at 23:13 +0200, Ulrich Weigand wrote: > Luis Machado wrote: > > > A new check should suffice for that. We will need three kinds of sets > > then: VSX-able, VMX-able and neither VSX or VMX. How does it sound? > > That sounds right. > > Thanks, > Ulrich > --- 2008-08-22 Luis Machado * ppc-linux-tdep.c (ppc_linux_vsx_regset_sections) New structure. (ppc_linux_vmx_regset_sections): New structure. (ppc_linux_fp_regset_sections): New structure. (ppc_linux_init_abi): Select core-file regset based on target features. Index: gdb/ppc-linux-tdep.c =================================================================== --- gdb.orig/ppc-linux-tdep.c 2008-08-22 15:12:04.000000000 -0700 +++ gdb/ppc-linux-tdep.c 2008-08-22 15:22:42.000000000 -0700 @@ -491,7 +491,7 @@ return ppc64_desc_entry_point (desc); } -static struct core_regset_section ppc_linux_regset_sections[] = +static struct core_regset_section ppc_linux_vsx_regset_sections[] = { { ".reg", 268 }, { ".reg2", 264 }, @@ -500,6 +500,21 @@ { NULL, 0} }; +static struct core_regset_section ppc_linux_vmx_regset_sections[] = +{ + { ".reg", 268 }, + { ".reg2", 264 }, + { ".reg-ppc-vmx", 544 }, + { NULL, 0} +}; + +static struct core_regset_section ppc_linux_fp_regset_sections[] = +{ + { ".reg", 268 }, + { ".reg2", 264 }, + { NULL, 0} +}; + static CORE_ADDR ppc64_standard_linkage2_target (struct frame_info *frame, CORE_ADDR pc, unsigned int *insn) @@ -1103,7 +1118,14 @@ set_gdbarch_core_read_description (gdbarch, ppc_linux_core_read_description); /* Supported register sections. */ - set_gdbarch_core_regset_sections (gdbarch, ppc_linux_regset_sections); + if (tdesc_find_feature (info.target_desc, + "org.gnu.gdb.power.vsx")) + set_gdbarch_core_regset_sections (gdbarch, ppc_linux_vsx_regset_sections); + else if (tdesc_find_feature (info.target_desc, + "org.gnu.gdb.power.altivec")) + set_gdbarch_core_regset_sections (gdbarch, ppc_linux_vmx_regset_sections); + else + set_gdbarch_core_regset_sections (gdbarch, ppc_linux_fp_regset_sections); /* Enable TLS support. */ set_gdbarch_fetch_tls_load_module_address (gdbarch,