From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4663 invoked by alias); 22 Jul 2003 18:43:13 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 4649 invoked from network); 22 Jul 2003 18:43:12 -0000 Received: from unknown (HELO mx1.redhat.com) (66.187.233.31) by sources.redhat.com with SMTP; 22 Jul 2003 18:43:12 -0000 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.11.6/8.11.6) with ESMTP id h6MIhBH11484 for ; Tue, 22 Jul 2003 14:43:11 -0400 Received: from pobox.corp.redhat.com (pobox.corp.redhat.com [172.16.52.156]) by int-mx1.corp.redhat.com (8.11.6/8.11.6) with ESMTP id h6MIhBI08567 for ; Tue, 22 Jul 2003 14:43:11 -0400 Received: from localhost.localdomain (vpn50-28.rdu.redhat.com [172.16.50.28]) by pobox.corp.redhat.com (8.11.6/8.11.6) with ESMTP id h6MIhBv26621 for ; Tue, 22 Jul 2003 14:43:11 -0400 Received: (from kev@localhost) by localhost.localdomain (8.11.6/8.11.6) id h6MIh5L04146 for gdb-patches@sources.redhat.com; Tue, 22 Jul 2003 11:43:05 -0700 Date: Tue, 22 Jul 2003 18:43:00 -0000 From: Kevin Buettner Message-Id: <1030722184305.ZM4145@localhost.localdomain> To: gdb-patches@sources.redhat.com Subject: [RFA/i386]: Enable default support for SSE registers MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-SW-Source: 2003-07/txt/msg00394.txt.bz2 I recently proposed enabling default support for SSE registers: http://sources.redhat.com/ml/gdb/2003-07/msg00159.html No one raised any issues, so here's a patch. Okay? * i386-tdep.c (i386_gdbarch_init): Enable default support for SSE registers. Index: i386-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/i386-tdep.c,v retrieving revision 1.162 diff -u -p -r1.162 i386-tdep.c --- i386-tdep.c 18 Jul 2003 21:31:50 -0000 1.162 +++ i386-tdep.c 22 Jul 2003 18:31:28 -0000 @@ -1716,10 +1716,23 @@ i386_gdbarch_init (struct gdbarch_info i tdep = XMALLOC (struct gdbarch_tdep); gdbarch = gdbarch_alloc (&info, tdep); - /* The i386 default settings don't include the SSE registers. + /* The i386 default settings now include the SSE registers. + I386_NUM_XREGS includes mxcsr, and we don't want to count + this as one of the xmm regs -- which is why we subtract one. + + Note: kevinb/2003-07-14: Whatever Mark's concerns are about the + FPU registers in the FIXME below apply to the SSE registers as well. + The only problem that I see is that these registers will show up + in "info all-registers" even on CPUs where they don't exist. IMO, + however, if it's a choice between printing them always (even when + they don't exist) or never showing them to the user (even when they + do exist), I prefer the former over the latter. Ideally, of course, + we'd somehow autodetect that we have them (or not) and display them + when we have them and suppress them when we don't. + FIXME: kettenis/20020614: They do include the FPU registers for now, which probably is not quite right. */ - tdep->num_xmm_regs = 0; + tdep->num_xmm_regs = I386_NUM_XREGS - 1; tdep->jb_pc_offset = -1; tdep->struct_return = pcc_struct_return; @@ -1741,9 +1754,9 @@ i386_gdbarch_init (struct gdbarch_info i alignment. */ set_gdbarch_long_double_bit (gdbarch, 96); - /* The default ABI includes general-purpose registers and - floating-point registers. */ - set_gdbarch_num_regs (gdbarch, I386_NUM_GREGS + I386_NUM_FREGS); + /* The default ABI includes general-purpose registers, + floating-point registers, and the SSE registers. */ + set_gdbarch_num_regs (gdbarch, I386_SSE_NUM_REGS); set_gdbarch_register_name (gdbarch, i386_register_name); set_gdbarch_register_type (gdbarch, i386_register_type);