From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 31512 invoked by alias); 22 May 2003 18:11:44 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 31468 invoked from network); 22 May 2003 18:11:43 -0000 Received: from unknown (HELO mx1.redhat.com) (66.187.233.31) by sources.redhat.com with SMTP; 22 May 2003 18:11:43 -0000 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.11.6/8.11.6) with ESMTP id h4MIBhH26660 for ; Thu, 22 May 2003 14:11:43 -0400 Received: from pobox.corp.redhat.com (pobox.corp.redhat.com [172.16.52.156]) by int-mx1.corp.redhat.com (8.11.6/8.11.6) with ESMTP id h4MIBhI00435 for ; Thu, 22 May 2003 14:11:43 -0400 Received: from localhost.localdomain (vpn50-3.rdu.redhat.com [172.16.50.3]) by pobox.corp.redhat.com (8.11.6/8.11.6) with ESMTP id h4MIBgo04958 for ; Thu, 22 May 2003 14:11:42 -0400 Received: (from kev@localhost) by localhost.localdomain (8.11.6/8.11.6) id h4MIBbk30708 for gdb-patches@sources.redhat.com; Thu, 22 May 2003 11:11:37 -0700 Date: Thu, 22 May 2003 18:11:00 -0000 From: Kevin Buettner Message-Id: <1030522181136.ZM30707@localhost.localdomain> To: gdb-patches@sources.redhat.com Subject: [RFC] dwarf2_compose_register_pieces for the e500 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-SW-Source: 2003-05/txt/msg00430.txt.bz2 As promised in http://sources.redhat.com/ml/gdb-patches/2003-05/msg00425.html, here's the what a ``dwarf2_compose_register_pieces'' method looks like for the e500. I don't plan on committing this patch unless the other generic portion referenced above is approved. * rs6000-tdep.c (e500_dwarf2_reg_to_regnum): Provide mapping for DWARF vector register numbers 1200 thru 1231. (e500_dwarf2_compose_register_pieces): New function. (rs6000_gdbarch_init): Initialize the ``dwarf2_compose_register_pieces'' method for the e500. Index: rs6000-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/rs6000-tdep.c,v retrieving revision 1.134 diff -u -p -r1.134 rs6000-tdep.c --- rs6000-tdep.c 17 May 2003 05:59:58 -0000 1.134 +++ rs6000-tdep.c 22 May 2003 16:39:17 -0000 @@ -1970,10 +1970,89 @@ e500_dwarf2_reg_to_regnum (int num) int regnum; if (0 <= num && num <= 31) return num + gdbarch_tdep (current_gdbarch)->ppc_gp0_regnum; + else if (1200 <= num && num <= 1231) + { + /* Note: 1200 thru 1231 are supposed to refer to only the high part + of the 64-bit r0 thru r31. However, this shouldn't matter in + practice because the only way we (should) see one of these is for + e500_dwarf2_compose_register_pieces() to return this value. */ + return num - 1200 + gdbarch_tdep (current_gdbarch)->ppc_ev0_regnum; + } else return num; } +/* Determine the register number, if any, that may be used to represent + all of pieces of an object. + + COUNT is the number of pieces. PIECE_INFO is an vector of + CORE_ADDRs which are arranged as follows: + + dwarf reg for piece 1 + size of piece 1 + . + . + . + dwarf reg for piece COUNT + size of piece COUNT + + Note that there are 2*COUNT elements in PIECE_INFO. + + The (dwarf) register number that may be used to represent all the pieces is + returned. If there is no such register, then -1 is returned. */ + +long +e500_dwarf2_compose_register_pieces (struct gdbarch *gdbarch, int count, + CORE_ADDR *piece_info) +{ + if (count == 2) + { + int hi_idx; + int lo_idx; + + /* Make sure that each piece is 4 bytes. */ + if (piece_info[1] != 4 || piece_info[3] != 4) + return -1; + + /* The endianess affects the order of the pieces. */ + if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + { + hi_idx = 0; + lo_idx = 2; + } + else + { + lo_idx = 0; + hi_idx = 2; + } + + /* Pattern match the pieces that we can handle. */ + if (0 <= piece_info[lo_idx] && piece_info[lo_idx] <= 31 + && piece_info[lo_idx] + 1200 == piece_info[hi_idx]) + { + /* Return the register number of the high order vector register. + This will be interpreted by e500_dwarf2_reg_to_regnum to be + the entire 64-bit vector register. */ + return piece_info[hi_idx]; + } + else if (0 <= piece_info[lo_idx] && piece_info[lo_idx] <= 31 + && piece_info[hi_idx] + 1 == piece_info[lo_idx]) + { + /* This is the normal way in which a long long type is put into + a pair of 32-bit registers. Again, return the register number + for the register containing the most significant bits. */ + return piece_info[hi_idx]; + } + else + { + /* We don't understand anything else. */ + return -1; + } + } + else + return -1; +} + /* Convert a dbx stab register number (from `r' declaration) to a gdb REGNUM. */ static int @@ -2829,6 +2908,7 @@ rs6000_gdbarch_init (struct gdbarch_info set_gdbarch_sp_regnum (gdbarch, tdep->ppc_gp0_regnum + 1); set_gdbarch_deprecated_fp_regnum (gdbarch, tdep->ppc_gp0_regnum + 1); set_gdbarch_dwarf2_reg_to_regnum (gdbarch, e500_dwarf2_reg_to_regnum); + set_gdbarch_dwarf2_compose_register_pieces (gdbarch, e500_dwarf2_compose_register_pieces); set_gdbarch_pseudo_register_read (gdbarch, e500_pseudo_register_read); set_gdbarch_pseudo_register_write (gdbarch, e500_pseudo_register_write); set_gdbarch_extract_return_value (gdbarch, e500_extract_return_value);