From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 23220 invoked by alias); 19 Mar 2003 06:39:32 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 23058 invoked from network); 19 Mar 2003 06:39:30 -0000 Received: from unknown (HELO mx1.redhat.com) (66.187.233.31) by sources.redhat.com with SMTP; 19 Mar 2003 06:39:30 -0000 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.11.6/8.11.6) with ESMTP id h2J6dTQ12935 for ; Wed, 19 Mar 2003 01:39:29 -0500 Received: from pobox.corp.redhat.com (pobox.corp.redhat.com [172.16.52.156]) by int-mx1.corp.redhat.com (8.11.6/8.11.6) with ESMTP id h2J6dSV27978; Wed, 19 Mar 2003 01:39:28 -0500 Received: from localhost.localdomain (vpn50-21.rdu.redhat.com [172.16.50.21]) by pobox.corp.redhat.com (8.11.6/8.11.6) with ESMTP id h2J6dR012542; Wed, 19 Mar 2003 01:39:27 -0500 Received: (from kev@localhost) by localhost.localdomain (8.11.6/8.11.6) id h2J6dMX28692; Tue, 18 Mar 2003 23:39:22 -0700 Date: Wed, 19 Mar 2003 06:39:00 -0000 From: Kevin Buettner Message-Id: <1030319063922.ZM28691@localhost.localdomain> In-Reply-To: Andrew Cagney "Re: [RFA] Use correct register names for MIPS n32/n64 ABIs" (Mar 18, 8:46pm) References: <1030318234150.ZM25965@localhost.localdomain> <3E77CBE4.4090009@redhat.com> To: Andrew Cagney Subject: Re: [RFA] Use correct register names for MIPS n32/n64 ABIs Cc: gdb-patches@sources.redhat.com MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-SW-Source: 2003-03/txt/msg00418.txt.bz2 On Mar 18, 8:46pm, Andrew Cagney wrote: > > Another follow on patch to this one would be to encode the knowledge > > of what the GPRs should be entirely within mips_register_name() and > > relegate the register name arrays to describing (only) the names of > > registers whose numbers are 32 or greater. (I'll wait to do this > > until I find out the reaction to the patch below.) > > Can you please just do this, and consider it pre-approved. When (regnum > < 32) have mips_register_name() always generate the name directly, only > refering to mips_processor_reg_names[] when i>=32. > > A bounds check on mips_processor_reg_names[i] probably wouldn't hurt. Okay, I've checked in the patch below. As I look at it now, I see that I wound up not using gdb_assert(). I had intended to use it, but wound up calling internal_error() directly. I can remove the include of gdb_assert.h if desired. My feeling is that it might as well be left in since mips-tdep.c could undoubtedly use a few asserts here and there... (heck, I could even add a few just so that I wouldn't have to remove that include. ;-) Hmm... I see that I also got the NUM_REGS check wrong. (It should be regno < NUM_REGS, not regno <= NUM_REGS.) I'll check in a one line fix for that in a moment. Kevin * Makefile.in (mips-tdep.o): Add dependency on $(gdb_assert_h). * mips-tdep.c (gdb_assert.h): Include. (mips_generic_reg_names, mips_processor_reg_names): Make static. (mips_register_name): Handle integer registers explicitly. Add bounds checking. (mips_r3041_reg_names, mips_r3051_reg_names, mips_r3081_reg_names) (mips_lsi33k_reg_names): Don't list integer registers; they're handled by mips_register_name() now. * config/mips/tm-irix3.h (MIPS_REGISTER_NAMES): Likewise. * config/mips/tm-irix6.h (MIPS_REGISTER_NAMES): Likewise. * config/mips/tm-mips.h (MIPS_REGISTER_NAMES): Likewise. * config/mips/tm-tx39.h (MIPS_REGISTER_NAMES): Likewise. * config/mips/tm-tx39l.h (MIPS_REGISTER_NAMES): Likewise. Index: Makefile.in =================================================================== RCS file: /cvs/src/src/gdb/Makefile.in,v retrieving revision 1.343 diff -u -p -r1.343 Makefile.in --- Makefile.in 18 Mar 2003 19:06:54 -0000 1.343 +++ Makefile.in 19 Mar 2003 06:18:51 -0000 @@ -1929,10 +1929,11 @@ mips-linux-tdep.o: mips-linux-tdep.c $(d $(solib_svr4_h) $(osabi_h) $(gdb_string_h) $(mips_tdep_h) \ $(gdb_assert_h) mips-nat.o: mips-nat.c $(defs_h) $(inferior_h) $(gdbcore_h) $(regcache_h) -mips-tdep.o: mips-tdep.c $(defs_h) $(gdb_string_h) $(frame_h) $(inferior_h) \ - $(symtab_h) $(value_h) $(gdbcmd_h) $(language_h) $(gdbcore_h) \ - $(symfile_h) $(objfiles_h) $(gdbtypes_h) $(target_h) $(arch_utils_h) \ - $(regcache_h) $(osabi_h) $(mips_tdep_h) $(block_h) $(opcode_mips_h) \ +mips-tdep.o: mips-tdep.c $(defs_h) $(gdb_string_h) $(gdb_assert_h) \ + $(frame_h) $(inferior_h) $(symtab_h) $(value_h) $(gdbcmd_h) \ + $(language_h) $(gdbcore_h) $(symfile_h) $(objfiles_h) \ + $(gdbtypes_h) $(target_h) $(arch_utils_h) $(regcache_h) \ + $(osabi_h) $(mips_tdep_h) $(block_h) $(opcode_mips_h) \ $(elf_mips_h) $(elf_bfd_h) $(symcat_h) mipsm3-nat.o: mipsm3-nat.c $(defs_h) $(inferior_h) $(regcache_h) mipsnbsd-nat.o: mipsnbsd-nat.c $(defs_h) $(inferior_h) $(regcache_h) \ Index: mips-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/mips-tdep.c,v retrieving revision 1.172 diff -u -p -r1.172 mips-tdep.c --- mips-tdep.c 14 Mar 2003 16:05:35 -0000 1.172 +++ mips-tdep.c 19 Mar 2003 06:18:54 -0000 @@ -25,6 +25,7 @@ #include "defs.h" #include "gdb_string.h" +#include "gdb_assert.h" #include "frame.h" #include "inferior.h" #include "symtab.h" @@ -361,23 +362,57 @@ static struct cmd_list_element *showmips /* A set of original names, to be used when restoring back to generic registers from a specific set. */ +static char *mips_generic_reg_names[] = MIPS_REGISTER_NAMES; -char *mips_generic_reg_names[] = MIPS_REGISTER_NAMES; -char **mips_processor_reg_names = mips_generic_reg_names; +/* Integer registers 0 thru 31 are handled explicitly by + mips_register_name(). Processor specific registers 32 and above + are listed in the sets of register names assigned to + mips_processor_reg_names. */ +static char **mips_processor_reg_names = mips_generic_reg_names; +/* Return the name of the register corresponding to REGNO. */ static const char * -mips_register_name (int i) +mips_register_name (int regno) { - return mips_processor_reg_names[i]; + /* GPR names for all ABIs other than n32/n64. */ + static char *mips_gpr_names[] = { + "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", + "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", + "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", + "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", + }; + + /* GPR names for n32 and n64 ABIs. */ + static char *mips_n32_n64_gpr_names[] = { + "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", + "a4", "a5", "a6", "a7", "t0", "t1", "t2", "t3", + "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", + "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra" + }; + + enum mips_abi abi = mips_abi (current_gdbarch); + + /* The MIPS integer registers are always mapped from 0 to 31. The + names of the registers (which reflects the conventions regarding + register use) vary depending on the ABI. */ + if (0 <= regno && regno < 32) + { + if (abi == MIPS_ABI_N32 || abi == MIPS_ABI_N64) + return mips_n32_n64_gpr_names[regno]; + else + return mips_gpr_names[regno]; + } + else if (32 <= regno && regno <= NUM_REGS) + return mips_processor_reg_names[regno - 32]; + else + internal_error (__FILE__, __LINE__, + "mips_register_name: bad register number %d", regno); } + /* *INDENT-OFF* */ /* Names of IDT R3041 registers. */ char *mips_r3041_reg_names[] = { - "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", - "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", "sr", "lo", "hi", "bad", "cause","pc", "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", @@ -391,10 +426,6 @@ char *mips_r3041_reg_names[] = { /* Names of IDT R3051 registers. */ char *mips_r3051_reg_names[] = { - "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", - "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", "sr", "lo", "hi", "bad", "cause","pc", "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", @@ -408,10 +439,6 @@ char *mips_r3051_reg_names[] = { /* Names of IDT R3081 registers. */ char *mips_r3081_reg_names[] = { - "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", - "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", "sr", "lo", "hi", "bad", "cause","pc", "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", @@ -425,10 +452,6 @@ char *mips_r3081_reg_names[] = { /* Names of LSI 33k registers. */ char *mips_lsi33k_reg_names[] = { - "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", - "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", "epc", "hi", "lo", "sr", "cause","badvaddr", "dcic", "bpc", "bda", "", "", "", "", "", "", "", "", "", "", "", "", "", Index: config/mips/tm-irix3.h =================================================================== RCS file: /cvs/src/src/gdb/config/mips/tm-irix3.h,v retrieving revision 1.4 diff -u -p -r1.4 tm-irix3.h --- config/mips/tm-irix3.h 13 Dec 2002 18:09:30 -0000 1.4 +++ config/mips/tm-irix3.h 19 Mar 2003 06:18:55 -0000 @@ -33,15 +33,11 @@ #undef FCRCS_REGNUM #undef FCRIR_REGNUM -/* Initializer for an array of names of registers. - There should be NUM_REGS strings in this initializer. */ +/* Initializer for an array of names for registers 32 and above. + There should be NUM_REGS-32 strings in this initializer. */ #define MIPS_REGISTER_NAMES \ - { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \ - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \ - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ - "t8", "t9", "k0", "k1", "gp", "sp", "fp", "ra", \ - "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ + { "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\ Index: config/mips/tm-irix6.h =================================================================== RCS file: /cvs/src/src/gdb/config/mips/tm-irix6.h,v retrieving revision 1.9 diff -u -p -r1.9 tm-irix6.h --- config/mips/tm-irix6.h 13 Dec 2002 18:09:30 -0000 1.9 +++ config/mips/tm-irix6.h 19 Mar 2003 06:18:55 -0000 @@ -34,15 +34,11 @@ #undef FCRCS_REGNUM #undef FCRIR_REGNUM -/* Initializer for an array of names of registers. - There should be NUM_REGS strings in this initializer. */ +/* Initializer for an array of names for registers 32 and above. + There should be NUM_REGS-32 strings in this initializer. */ #define MIPS_REGISTER_NAMES \ - { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \ - "a4", "a5", "a6", "a7", "t0", "t1", "t2", "t3", \ - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ - "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \ - "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ + { "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\ Index: config/mips/tm-mips.h =================================================================== RCS file: /cvs/src/src/gdb/config/mips/tm-mips.h,v retrieving revision 1.46 diff -u -p -r1.46 tm-mips.h --- config/mips/tm-mips.h 13 Dec 2002 18:09:30 -0000 1.46 +++ config/mips/tm-mips.h 19 Mar 2003 06:18:55 -0000 @@ -59,16 +59,12 @@ extern int mips_step_skips_delay (CORE_A #define MIPS_REGSIZE 4 #endif -/* Initializer for an array of names of registers. - There should be NUM_REGS strings in this initializer. */ +/* Initializer for an array of names for registers 32 and above. + There should be NUM_REGS-32 strings in this initializer. */ #ifndef MIPS_REGISTER_NAMES #define MIPS_REGISTER_NAMES \ - { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \ - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \ - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ - "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \ - "sr", "lo", "hi", "bad", "cause","pc", \ + { "sr", "lo", "hi", "bad", "cause","pc", \ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\ Index: config/mips/tm-tx39.h =================================================================== RCS file: /cvs/src/src/gdb/config/mips/tm-tx39.h,v retrieving revision 1.5 diff -u -p -r1.5 tm-tx39.h --- config/mips/tm-tx39.h 6 Mar 2001 08:21:32 -0000 1.5 +++ config/mips/tm-tx39.h 19 Mar 2003 06:18:55 -0000 @@ -21,11 +21,7 @@ #undef MIPS_REGISTER_NAMES #define MIPS_REGISTER_NAMES \ - { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \ - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \ - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ - "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \ - "sr", "lo", "hi", "bad", "cause","pc", \ + { "sr", "lo", "hi", "bad", "cause","pc", \ "", "", "", "", "", "", "", "", \ "", "", "", "", "", "", "", "", \ "", "", "", "", "", "", "", "", \ Index: config/mips/tm-tx39l.h =================================================================== RCS file: /cvs/src/src/gdb/config/mips/tm-tx39l.h,v retrieving revision 1.5 diff -u -p -r1.5 tm-tx39l.h --- config/mips/tm-tx39l.h 6 Mar 2001 08:21:32 -0000 1.5 +++ config/mips/tm-tx39l.h 19 Mar 2003 06:18:55 -0000 @@ -21,11 +21,7 @@ #undef MIPS_REGISTER_NAMES #define MIPS_REGISTER_NAMES \ - { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \ - "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \ - "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ - "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra", \ - "sr", "lo", "hi", "bad", "cause","pc", \ + { "sr", "lo", "hi", "bad", "cause","pc", \ "", "", "", "", "", "", "", "", \ "", "", "", "", "", "", "", "", \ "", "", "", "", "", "", "", "", \