From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 5456 invoked by alias); 1 Aug 2002 23:17:24 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 5441 invoked from network); 1 Aug 2002 23:17:23 -0000 Received: from unknown (HELO mx1.redhat.com) (66.187.233.31) by sources.redhat.com with SMTP; 1 Aug 2002 23:17:23 -0000 Received: from int-mx2.corp.redhat.com (nat-pool-rdu.redhat.com [172.16.52.200] (may be forged)) by mx1.redhat.com (8.11.6/8.11.6) with ESMTP id g71N4pl14443 for ; Thu, 1 Aug 2002 19:04:51 -0400 Received: from potter.sfbay.redhat.com (potter.sfbay.redhat.com [172.16.27.15]) by int-mx2.corp.redhat.com (8.11.6/8.11.6) with ESMTP id g71NHKu11157; Thu, 1 Aug 2002 19:17:20 -0400 Received: from romulus.sfbay.redhat.com (IDENT:dp0AO0aRFGi14/uYM/HCpWwQk+uR1FIa@romulus.sfbay.redhat.com [172.16.27.251]) by potter.sfbay.redhat.com (8.11.6/8.11.6) with ESMTP id g71NHJm08765; Thu, 1 Aug 2002 16:17:19 -0700 Received: (from kev@localhost) by romulus.sfbay.redhat.com (8.11.6/8.11.6) id g71NHHU30709; Thu, 1 Aug 2002 16:17:17 -0700 Date: Thu, 01 Aug 2002 16:17:00 -0000 From: Kevin Buettner Message-Id: <1020801231716.ZM30708@localhost.localdomain> In-Reply-To: Andrew Cagney "Re: [PATCH] 64-bit support for Irix 6" (Aug 1, 4:28pm) References: <1020731172757.ZM21630@localhost.localdomain> <3D494F95.5060708@ges.redhat.com> <1020801165318.ZM27591@localhost.localdomain> <3D497309.7020300@ges.redhat.com> <1020801200749.ZM29220@localhost.localdomain> <3D4999FF.5040504@ges.redhat.com> To: Andrew Cagney Subject: Re: [PATCH] 64-bit support for Irix 6 Cc: gdb-patches@sources.redhat.com MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-SW-Source: 2002-08/txt/msg00037.txt.bz2 On Aug 1, 4:28pm, Andrew Cagney wrote: > > + set_gdbarch_register_virtual_type (gdbarch, mips_register_virtual_type); > > Can you please add a comment here explaining that many MIPS targets do > not yet use this method because they are still defining the macro. Done. (Separate patch committed a little while ago.) > As a separate patch, could you please update things so that: > > > +static struct type * > > +mips_register_virtual_type (int reg) > > +{ > > + if (FP0_REGNUM <= reg && reg < FP0_REGNUM + 32) > > + return builtin_type_double; > > This returns ieee_double big/little. > > > + else if (reg == PS_REGNUM /* CR */) > > + return builtin_type_uint32; > > + else if (FCRCS_REGNUM <= reg && reg <= LAST_EMBED_REGNUM) > > + return builtin_type_uint32; > > + else > > + { > > + /* Everything else... return ``long long'' when registers > > + are 64-bits wide, ``int'' otherwise. */ > > + if (MIPS_REGSIZE == TYPE_LENGTH (builtin_type_long_long)) > > + return builtin_type_long_long; > > This returns builtin_type_uint64. > > > + else > > > + return builtin_type_int; > > This returns builtin_type_uint32. Done. See below: * mips-tdep.c (mips_register_virtual_type): Use architecture invariant return values. Index: mips-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/mips-tdep.c,v retrieving revision 1.87 diff -u -p -r1.87 mips-tdep.c --- mips-tdep.c 1 Aug 2002 21:36:27 -0000 1.87 +++ mips-tdep.c 1 Aug 2002 23:02:18 -0000 @@ -497,19 +497,25 @@ static struct type * mips_register_virtual_type (int reg) { if (FP0_REGNUM <= reg && reg < FP0_REGNUM + 32) - return builtin_type_double; + { + /* Floating point registers... */ + if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) + return builtin_type_ieee_double_big; + else + return builtin_type_ieee_double_little; + } else if (reg == PS_REGNUM /* CR */) return builtin_type_uint32; else if (FCRCS_REGNUM <= reg && reg <= LAST_EMBED_REGNUM) return builtin_type_uint32; else { - /* Everything else... return ``long long'' when registers - are 64-bits wide, ``int'' otherwise. */ - if (MIPS_REGSIZE == TYPE_LENGTH (builtin_type_long_long)) - return builtin_type_long_long; + /* Everything else... + Return type appropriate for width of register. */ + if (MIPS_REGSIZE == TYPE_LENGTH (builtin_type_uint64)) + return builtin_type_uint64; else - return builtin_type_int; + return builtin_type_uint32; } }