From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 14076 invoked by alias); 22 Jul 2002 19:25:27 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 14068 invoked from network); 22 Jul 2002 19:25:26 -0000 Received: from unknown (HELO potter.sfbay.redhat.com) (205.180.83.107) by sources.redhat.com with SMTP; 22 Jul 2002 19:25:26 -0000 Received: from romulus.sfbay.redhat.com (IDENT:m5Ru1uXHKuY/YdvZJh1dk04rd9xIBfoA@romulus.sfbay.redhat.com [172.16.27.251]) by potter.sfbay.redhat.com (8.11.6/8.11.6) with ESMTP id g6MJPlQ17985; Mon, 22 Jul 2002 12:25:47 -0700 Received: (from kev@localhost) by romulus.sfbay.redhat.com (8.11.6/8.11.6) id g6MJPMO25197; Mon, 22 Jul 2002 12:25:22 -0700 Date: Mon, 22 Jul 2002 12:41:00 -0000 From: Kevin Buettner Message-Id: <1020722192522.ZM25196@localhost.localdomain> In-Reply-To: Michael Snyder "Another patch to aix-thread.c" (Jul 18, 12:17pm) References: <3D37144C.1AEBF992@redhat.com> To: Michael Snyder , gdb-patches@sources.redhat.com Subject: Re: Another patch to aix-thread.c MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-SW-Source: 2002-07/txt/msg00441.txt.bz2 On Jul 18, 12:17pm, Michael Snyder wrote: > In aix-thread.c there are some obsolete and/or dubious uses of the > register cache (including direct reading/writing to the register cache). I agree. Thanks for helping me clean up this code. > This patch (which I emphasize, I have not tested!) > cleans them up and/or re-writes some of them. > > Short summary: target_store_registers should copy the register cache > into the child's register state, but not by reading from the registers > array directly, and not by calling read_register. The API for the > target layer to get the contents of the cache is register_collect(). > I also replaced a call to read_register_bytes from ops_prepare_to_store. I've committed Michael's patch. Prior to doing so, I made the following changes: * aix-thread.c (gdb_assert.h): Include. (fill_sprs64, fill_sprs32): Add selected asserts to make sure that register sizes (from register cache) match size of buffer holding register data. (fill_sprs32): Change parameter types to match those in the ptrace() buffer. (store_regs_lib): Likewise, but for 32-bit temporary variables. (ops_prepare_to_store): Rename loop variable ``i'' to ``regno''. --- aix-thread.c.snyder Mon Jul 22 10:55:41 2002 +++ aix-thread.c Mon Jul 22 11:52:12 2002 @@ -42,6 +42,7 @@ */ #include "defs.h" +#include "gdb_assert.h" #include "gdbthread.h" #include "target.h" #include "inferior.h" @@ -1250,26 +1251,34 @@ fill_sprs64 (uint64_t *iar, uint64_t *ms { int regno = FIRST_UISA_SP_REGNUM; - regcache_collect (regno, (void *) iar); - regcache_collect (regno + 1, (void *) msr); - regcache_collect (regno + 2, (void *) cr); - regcache_collect (regno + 3, (void *) lr); - regcache_collect (regno + 4, (void *) ctr); - regcache_collect (regno + 5, (void *) xer); + gdb_assert (sizeof (*iar) == REGISTER_RAW_SIZE (regno)); + + regcache_collect (regno, iar); + regcache_collect (regno + 1, msr); + regcache_collect (regno + 2, cr); + regcache_collect (regno + 3, lr); + regcache_collect (regno + 4, ctr); + regcache_collect (regno + 5, xer); } static void -fill_sprs32 (uint32_t *iar, uint32_t *msr, uint32_t *cr, - uint32_t *lr, uint32_t *ctr, uint32_t *xer) +fill_sprs32 (unsigned long *iar, unsigned long *msr, unsigned long *cr, + unsigned long *lr, unsigned long *ctr, unsigned long *xer) { int regno = FIRST_UISA_SP_REGNUM; - regcache_collect (regno, (void *) iar); - regcache_collect (regno + 1, (void *) msr); - regcache_collect (regno + 2, (void *) cr); - regcache_collect (regno + 3, (void *) lr); - regcache_collect (regno + 4, (void *) ctr); - regcache_collect (regno + 5, (void *) xer); + /* If this assert() fails, the most likely reason is that GDB was + built incorrectly. In order to make use of many of the header + files in /usr/include/sys, GDB needs to be configured so that + sizeof (long) == 4). */ + gdb_assert (sizeof (*iar) == REGISTER_RAW_SIZE (regno)); + + regcache_collect (regno, iar); + regcache_collect (regno + 1, msr); + regcache_collect (regno + 2, cr); + regcache_collect (regno + 3, lr); + regcache_collect (regno + 4, ctr); + regcache_collect (regno + 5, xer); } /* Store all registers into pthread PDTID, which doesn't have a kernel @@ -1325,16 +1334,18 @@ store_regs_lib (pthdb_pthread_t pdtid) else { /* Problem: ctx.iar etc. are 64 bits, but raw_registers are 32. - Solution: use 32-bit temp variables. */ - uint32_t tmp1, tmp2, tmp3, tmp4, tmp5, tmp6; - - fill_sprs32 (&tmp1, &tmp2, &tmp3, &tmp4, &tmp5, &tmp6); - ctx.iar = tmp1; - ctx.msr = tmp2; - ctx.cr = tmp3; - ctx.lr = tmp4; - ctx.ctr = tmp5; - ctx.xer = tmp6; + Solution: use 32-bit temp variables. (The assert() in fill_sprs32() + will fail if the size of an unsigned long is incorrect. If this + happens, GDB needs to be reconfigured so that longs are 32-bits.) */ + unsigned long tmp_iar, tmp_msr, tmp_cr, tmp_lr, tmp_ctr, tmp_xer; + + fill_sprs32 (&tmp_iar, &tmp_msr, &tmp_cr, &tmp_lr, &tmp_ctr, &tmp_xer); + ctx.iar = tmp_iar; + ctx.msr = tmp_msr; + ctx.cr = tmp_cr; + ctx.lr = tmp_lr; + ctx.ctr = tmp_ctr; + ctx.xer = tmp_xer; } status = pthdb_pthread_setcontext (pd_session, pdtid, &ctx); @@ -1448,14 +1459,14 @@ ops_store_registers (int regno) static void ops_prepare_to_store (void) { - int i; + int regno; if (!PD_TID (inferior_ptid)) base_ops.to_prepare_to_store (); else - for (i = 0; i < NUM_REGS; i++) - if (!register_cached (i)) - target_fetch_registers (regnum); + for (regno = 0; regno < NUM_REGS; regno++) + if (!register_cached (regno)) + target_fetch_registers (regno); } /* Transfer LEN bytes of memory from GDB address MYADDR to target