From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 1083 invoked by alias); 9 Dec 2001 08:38:12 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 970 invoked from network); 9 Dec 2001 08:36:53 -0000 Received: from unknown (HELO smtp.noos.fr) (212.198.2.74) by sources.redhat.com with SMTP; 9 Dec 2001 08:36:53 -0000 Received: (qmail 62898180 invoked by uid 0); 9 Dec 2001 08:36:52 -0000 Received: from unknown (HELO e133.dhcp212-198-23.noos.fr) ([212.198.23.133]) (envelope-sender ) by 212.198.2.74 (qmail-ldap-1.03) with SMTP for ; 9 Dec 2001 08:36:52 -0000 Subject: [patch] correct handling of lswx and mtfsfi instructions in ppc simulator From: Julien Ducourthial To: gdb-patches@sources.redhat.com Content-Type: text/plain Content-Transfer-Encoding: 7bit X-Mailer: Evolution/1.0 (Preview Release) Date: Sun, 09 Dec 2001 00:38:00 -0000 Message-Id: <1007887536.12196.1.camel@athlon_force.localdomain> Mime-Version: 1.0 X-SW-Source: 2001-12/txt/msg00248.txt.bz2 Hi, When running a program (which works ok on PPC boards) in the simulator: * the lswx instruction generates exceptions where it should not, * the mtfsi instruction is not recognized at all. After checking ppc-instructions : * it seems there are a few typos in the registers handling in lswx (using bytes or bits index instead of register numbers). * the prefix of mtfsfi is 64 instead of 63 (from "Powerpc : The Programming Environment"). the patch below fixes both problems. 2001-12-09 Julien Ducourthial * ppc-instructions (lswx): do the register control with the register count. Initialize the right register in the loop. * (mtfsfi) : correct prefix for the instruction. Index: ppc-instructions =================================================================== RCS file: /cvs/src/src/sim/ppc/ppc-instructions,v retrieving revision 1.3 diff -c -3 -r1.3 ppc-instructions *** ppc-instructions 2000/10/24 16:16:43 1.3 --- ppc-instructions 2001/12/09 07:49:47 *************** *** 2275,2285 **** r = RT - 1; i = 32; nr = (n + 3) / 4; ! if (((RT + n >= 32) ! ? ((RA >= RT || RA < (RT + n) % 32) ! || (RB >= RT || RB < (RT + n) % 32)) ! : ((RA >= RT && RA < RT + n) ! || (RB >= RT && RB < RT + n))) || (RT == RA || RT == RB)) program_interrupt(processor, cia, illegal_instruction_program_interrupt); --- 2275,2285 ---- r = RT - 1; i = 32; nr = (n + 3) / 4; ! if (((RT + nr >= 32) ! ? ((RA >= RT || RA < (RT + nr) % 32) ! || (RB >= RT || RB < (RT + nr) % 32)) ! : ((RA >= RT && RA < RT + nr) ! || (RB >= RT && RB < RT + nr))) || (RT == RA || RT == RB)) program_interrupt(processor, cia, illegal_instruction_program_interrupt); *************** *** 2288,2294 **** while (n > 0) { if (i == 32) { r = (r + 1) % 32; ! GPR(i) = 0; } GPR(r) |= INSERTED(MEM(unsigned, EA, 1), i, i+7); i = i + 8; --- 2288,2294 ---- while (n > 0) { if (i == 32) { r = (r + 1) % 32; ! GPR(r) = 0; } GPR(r) |= INSERTED(MEM(unsigned, EA, 1), i, i+7); i = i + 8; *************** *** 4582,4588 **** FPSCR_SET(BFA, 0); /* FPSCR_END fixes up FEX/VX */ FPSCR_END(0); ! 0.64,6.BF,9./,11./,16.U,20./,21.134,31.Rc:X:f::Move To FPSCR Field Immediate FPSCR_BEGIN; FPSCR_SET(BF, U); FPSCR_END(Rc); --- 4582,4588 ---- FPSCR_SET(BFA, 0); /* FPSCR_END fixes up FEX/VX */ FPSCR_END(0); ! 0.63,6.BF,9./,11./,16.U,20./,21.134,31.Rc:X:f::Move To FPSCR Field Immediate FPSCR_BEGIN; FPSCR_SET(BF, U); FPSCR_END(Rc);