From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 18866 invoked by alias); 24 Aug 2019 23:53:43 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 18855 invoked by uid 89); 24 Aug 2019 23:53:43 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-15.4 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,SPF_HELO_PASS,SPF_PASS autolearn=ham version=3.3.1 spammy=H*u:Webmail, H*UA:Roundcube, H*u:Roundcube, H*UA:Webmail X-HELO: smtp.polymtl.ca Received: from smtp.polymtl.ca (HELO smtp.polymtl.ca) (132.207.4.11) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Sat, 24 Aug 2019 23:53:40 +0000 Received: from simark.ca (simark.ca [158.69.221.121]) (authenticated bits=0) by smtp.polymtl.ca (8.14.7/8.14.7) with ESMTP id x7ONrWJl012790 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Sat, 24 Aug 2019 19:53:37 -0400 DKIM-Filter: OpenDKIM Filter v2.11.0 smtp.polymtl.ca x7ONrWJl012790 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=polymtl.ca; s=default; t=1566690818; bh=x+8jSabPkzXkJ7azloBE4bUsmN/CoRGQYku1uTlxsQc=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Btz9iJ+M5JfwOIGKuJIkaV7+vKeFLm66Ggstd/hydMQn6Am/C5YMFtcHyn5Ipc+7I Wkn6hOo3139D87UuY8Lm8wTbu9ioRecwcjhUh9xOjY5mwBA1EMv7B9TLRj2T+5n7VN onC3b89FN1X9h/VzKhvFjjd2tZl+DKuwL43QwrVY= Received: by simark.ca (Postfix, from userid 112) id 5AA7D1F342; Sat, 24 Aug 2019 19:53:32 -0400 (EDT) Received: from simark.ca (localhost [127.0.0.1]) by simark.ca (Postfix) with ESMTP id D91811EBE5; Sat, 24 Aug 2019 19:53:29 -0400 (EDT) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit Date: Sat, 24 Aug 2019 23:53:00 -0000 From: Simon Marchi To: Yoshinori Sato Cc: gdb-patches@sourceware.org Subject: Re: [PATCH v4] Convert the RX target to make use of target descriptions. In-Reply-To: <20190824135828.116798-1-ysato@users.sourceforge.jp> References: <20190824135828.116798-1-ysato@users.sourceforge.jp> Message-ID: <0b536def07a529cc0eb7dc78a44a8745@polymtl.ca> X-Sender: simon.marchi@polymtl.ca User-Agent: Roundcube Webmail/1.3.6 X-IsSubscribed: yes X-SW-Source: 2019-08/txt/msg00566.txt.bz2 On 2019-08-24 09:58, Yoshinori Sato wrote: > gdb/ChangeLog > > 2019-08-24 Yoshinori Sato > > * gdb/rx-tdep.c (rx_register_names): New. > (rx_register_name): Delete. > (rx_psw_type): Delete. > (rx_fpsw_type): Delete. > (rx_register_type): Delete. > (rx_gdbarch_init): Convert target-descriptions. > (_initialize_rx_tdep): Add initialize_tdesc_rx. > * gdb/features/Makefile: Add rx.xml. > * gdb/features/rx.xml: New. > * gdb/features/rx.c: Generated. > * gdb/NEWS: Mention target description support. > > gdb/doc/ChangeLog: > > 2019-08-24 Yoshinori Sato > > * gdb.texinfo (Standard Target Features): Add RX Features sub-section. > > v4 > --- > gdb/NEWS | 2 + > gdb/doc/gdb.texinfo | 10 ++++ > gdb/features/Makefile | 2 + > gdb/features/rx.c | 80 +++++++++++++++++++++++++ > gdb/features/rx.xml | 74 +++++++++++++++++++++++ > gdb/rx-tdep.c | 160 > ++++++++++++++------------------------------------ > 6 files changed, 213 insertions(+), 115 deletions(-) > create mode 100644 gdb/features/rx.c > create mode 100644 gdb/features/rx.xml > > diff --git a/gdb/NEWS b/gdb/NEWS > index 462247f486..dc32e10a2c 100644 > --- a/gdb/NEWS > +++ b/gdb/NEWS > @@ -27,6 +27,8 @@ > provide the exitcode or exit status of the shell commands launched > by > GDB commands such as "shell", "pipe" and "make". > > +* The RX port now supports XML target descriptions. > + > * Python API > > ** The gdb.Value type has a new method 'format_string' which returns > a > diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo > index 523e3d0bfe..ad70807953 100644 > --- a/gdb/doc/gdb.texinfo > +++ b/gdb/doc/gdb.texinfo > @@ -44068,6 +44068,7 @@ registers using the capitalization used in the > description. > * OpenRISC 1000 Features:: > * PowerPC Features:: > * RISC-V Features:: > +* RX Features:: > * S/390 and System z Features:: > * Sparc Features:: > * TIC6x Features:: > @@ -44498,6 +44499,15 @@ target has floating point hardware, but can > be moved into the csr > feature if the target has the floating point control registers, but no > other floating point hardware. > > +@node RX Features > +@subsection RX Features > +@cindex target descriptions, RX Features > + > +The @samp{org.gnu.gdb.rx.core} feature is required for RX > +targets. It should contain the registers @samp{r0} through > +@samp{r15}, @samp{usp}, @samp{isp}, @samp{psw}, @samp{pc}, > @samp{intb}, > +@samp{bpsw}, @samp{bpc}, @samp{fintv}, @samp{fpsw}, and @samp{acc}. > + > @node S/390 and System z Features > @subsection S/390 and System z Features > @cindex target descriptions, S/390 features > diff --git a/gdb/features/Makefile b/gdb/features/Makefile > index 0c84faf405..2b65d46df0 100644 > --- a/gdb/features/Makefile > +++ b/gdb/features/Makefile > @@ -161,6 +161,7 @@ XMLTOC = \ > rs6000/powerpc-vsx64.xml \ > rs6000/powerpc-vsx64l.xml \ > rs6000/rs6000.xml \ > + rx.xml \ > s390-linux32.xml \ > s390-linux32v1.xml \ > s390-linux32v2.xml \ > @@ -238,6 +239,7 @@ FEATURE_XMLFILES = aarch64-core.xml \ > riscv/64bit-cpu.xml \ > riscv/64bit-csr.xml \ > riscv/64bit-fpu.xml \ > + rx.xml \ > tic6x-c6xp.xml \ > tic6x-core.xml \ > tic6x-gp.xml > diff --git a/gdb/features/rx.c b/gdb/features/rx.c > new file mode 100644 > index 0000000000..d2c29c126f > --- /dev/null > +++ b/gdb/features/rx.c > @@ -0,0 +1,80 @@ > +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: > + Original: rx.xml.tmp */ > + > +#include "defs.h" > +#include "osabi.h" > +#include "target-descriptions.h" > + > +struct target_desc *tdesc_rx; > +static void > +initialize_tdesc_rx (void) > +{ > + struct target_desc *result = allocate_target_description (); > + struct tdesc_feature *feature; > + > + feature = tdesc_create_feature (result, "org.gnu.gdb.rx.core"); > + tdesc_type_with_fields *type_with_fields; > + type_with_fields = tdesc_create_flags (feature, "psw_flags", 4); > + tdesc_add_flag (type_with_fields, 0, "C"); > + tdesc_add_flag (type_with_fields, 1, "Z"); > + tdesc_add_flag (type_with_fields, 2, "S"); > + tdesc_add_flag (type_with_fields, 3, "O"); > + tdesc_add_flag (type_with_fields, 16, "I"); > + tdesc_add_flag (type_with_fields, 17, "U"); > + tdesc_add_flag (type_with_fields, 20, "PM"); > + tdesc_add_flag (type_with_fields, 24, "IPL0"); > + tdesc_add_flag (type_with_fields, 25, "IPL1"); > + tdesc_add_flag (type_with_fields, 26, "IPL2"); > + tdesc_add_flag (type_with_fields, 27, "IPL3"); > + > + type_with_fields = tdesc_create_flags (feature, "fpsw_flags", 4); > + tdesc_add_flag (type_with_fields, 0, "RM0"); > + tdesc_add_flag (type_with_fields, 1, "RM1"); > + tdesc_add_flag (type_with_fields, 2, "CV"); > + tdesc_add_flag (type_with_fields, 3, "CO"); > + tdesc_add_flag (type_with_fields, 4, "CZ"); > + tdesc_add_flag (type_with_fields, 5, "CU"); > + tdesc_add_flag (type_with_fields, 6, "CX"); > + tdesc_add_flag (type_with_fields, 7, "CE"); > + tdesc_add_flag (type_with_fields, 8, "DN"); > + tdesc_add_flag (type_with_fields, 10, "EV"); > + tdesc_add_flag (type_with_fields, 11, "EO"); > + tdesc_add_flag (type_with_fields, 12, "EZ"); > + tdesc_add_flag (type_with_fields, 13, "EU"); > + tdesc_add_flag (type_with_fields, 14, "EX"); > + tdesc_add_flag (type_with_fields, 26, "FV"); > + tdesc_add_flag (type_with_fields, 27, "FO"); > + tdesc_add_flag (type_with_fields, 28, "FZ"); > + tdesc_add_flag (type_with_fields, 29, "FU"); > + tdesc_add_flag (type_with_fields, 30, "FX"); > + tdesc_add_flag (type_with_fields, 31, "FS"); > + > + tdesc_create_reg (feature, "r0", 0, 1, NULL, 32, "data_ptr"); > + tdesc_create_reg (feature, "r1", 1, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "r2", 2, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "r3", 3, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "r4", 4, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "r5", 5, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "r6", 6, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "r7", 7, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "r8", 8, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "r9", 9, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "r10", 10, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "r11", 11, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "r12", 12, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "r13", 13, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "r14", 14, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "r15", 15, 1, NULL, 32, "uint32"); > + tdesc_create_reg (feature, "usp", 16, 1, NULL, 32, "data_ptr"); > + tdesc_create_reg (feature, "isp", 17, 1, NULL, 32, "data_ptr"); > + tdesc_create_reg (feature, "psw", 18, 1, NULL, 32, "psw_flags"); > + tdesc_create_reg (feature, "pc", 19, 1, NULL, 32, "code_ptr"); > + tdesc_create_reg (feature, "intb", 20, 1, NULL, 32, "data_ptr"); > + tdesc_create_reg (feature, "bpsw", 21, 1, NULL, 32, "psw_flags"); > + tdesc_create_reg (feature, "bpc", 22, 1, NULL, 32, "code_ptr"); > + tdesc_create_reg (feature, "fintv", 23, 1, NULL, 32, "code_ptr"); > + tdesc_create_reg (feature, "fpsw", 24, 1, NULL, 32, "fpsw_flags"); > + tdesc_create_reg (feature, "acc", 25, 1, NULL, 64, "uint64"); > + > + tdesc_rx = result; > +} > diff --git a/gdb/features/rx.xml b/gdb/features/rx.xml > new file mode 100644 > index 0000000000..597f92974b > --- /dev/null > +++ b/gdb/features/rx.xml > @@ -0,0 +1,74 @@ > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > + > diff --git a/gdb/rx-tdep.c b/gdb/rx-tdep.c > index 4cbf919db9..45cc8b4535 100644 > --- a/gdb/rx-tdep.c > +++ b/gdb/rx-tdep.c > @@ -33,11 +33,15 @@ > #include "value.h" > #include "gdbcore.h" > #include "dwarf2-frame.h" > +#include "remote.h" > +#include "target-descriptions.h" > > #include "elf/rx.h" > #include "elf-bfd.h" > #include > > +#include "features/rx.c" > + > /* Certain important register numbers. */ > enum > { > @@ -114,117 +118,13 @@ struct rx_prologue > int reg_offset[RX_NUM_REGS]; > }; > > -/* Implement the "register_name" gdbarch method. */ > -static const char * > -rx_register_name (struct gdbarch *gdbarch, int regnr) > -{ > - static const char *const reg_names[] = { > - "r0", > - "r1", > - "r2", > - "r3", > - "r4", > - "r5", > - "r6", > - "r7", > - "r8", > - "r9", > - "r10", > - "r11", > - "r12", > - "r13", > - "r14", > - "r15", > - "usp", > - "isp", > - "psw", > - "pc", > - "intb", > - "bpsw", > - "bpc", > - "fintv", > - "fpsw", > - "acc" > - }; > - > - return reg_names[regnr]; > -} > - > -/* Construct the flags type for PSW and BPSW. */ > - > -static struct type * > -rx_psw_type (struct gdbarch *gdbarch) > -{ > - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); > - > - if (tdep->rx_psw_type == NULL) > - { > - tdep->rx_psw_type = arch_flags_type (gdbarch, "rx_psw_type", > 32); > - append_flags_type_flag (tdep->rx_psw_type, 0, "C"); > - append_flags_type_flag (tdep->rx_psw_type, 1, "Z"); > - append_flags_type_flag (tdep->rx_psw_type, 2, "S"); > - append_flags_type_flag (tdep->rx_psw_type, 3, "O"); > - append_flags_type_flag (tdep->rx_psw_type, 16, "I"); > - append_flags_type_flag (tdep->rx_psw_type, 17, "U"); > - append_flags_type_flag (tdep->rx_psw_type, 20, "PM"); > - append_flags_type_flag (tdep->rx_psw_type, 24, "IPL0"); > - append_flags_type_flag (tdep->rx_psw_type, 25, "IPL1"); > - append_flags_type_flag (tdep->rx_psw_type, 26, "IPL2"); > - append_flags_type_flag (tdep->rx_psw_type, 27, "IPL3"); > - } > - return tdep->rx_psw_type; > -} > - > -/* Construct flags type for FPSW. */ > - > -static struct type * > -rx_fpsw_type (struct gdbarch *gdbarch) > -{ > - struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); > - > - if (tdep->rx_fpsw_type == NULL) > - { > - tdep->rx_fpsw_type = arch_flags_type (gdbarch, "rx_fpsw_type", > 32); > - append_flags_type_flag (tdep->rx_fpsw_type, 0, "RM0"); > - append_flags_type_flag (tdep->rx_fpsw_type, 1, "RM1"); > - append_flags_type_flag (tdep->rx_fpsw_type, 2, "CV"); > - append_flags_type_flag (tdep->rx_fpsw_type, 3, "CO"); > - append_flags_type_flag (tdep->rx_fpsw_type, 4, "CZ"); > - append_flags_type_flag (tdep->rx_fpsw_type, 5, "CU"); > - append_flags_type_flag (tdep->rx_fpsw_type, 6, "CX"); > - append_flags_type_flag (tdep->rx_fpsw_type, 7, "CE"); > - append_flags_type_flag (tdep->rx_fpsw_type, 8, "DN"); > - append_flags_type_flag (tdep->rx_fpsw_type, 10, "EV"); > - append_flags_type_flag (tdep->rx_fpsw_type, 11, "EO"); > - append_flags_type_flag (tdep->rx_fpsw_type, 12, "EZ"); > - append_flags_type_flag (tdep->rx_fpsw_type, 13, "EU"); > - append_flags_type_flag (tdep->rx_fpsw_type, 14, "EX"); > - append_flags_type_flag (tdep->rx_fpsw_type, 26, "FV"); > - append_flags_type_flag (tdep->rx_fpsw_type, 27, "FO"); > - append_flags_type_flag (tdep->rx_fpsw_type, 28, "FZ"); > - append_flags_type_flag (tdep->rx_fpsw_type, 29, "FU"); > - append_flags_type_flag (tdep->rx_fpsw_type, 30, "FX"); > - append_flags_type_flag (tdep->rx_fpsw_type, 31, "FS"); > - } > - > - return tdep->rx_fpsw_type; > -} > - > -/* Implement the "register_type" gdbarch method. */ > -static struct type * > -rx_register_type (struct gdbarch *gdbarch, int reg_nr) > -{ > - if (reg_nr == RX_PC_REGNUM) > - return builtin_type (gdbarch)->builtin_func_ptr; > - else if (reg_nr == RX_PSW_REGNUM || reg_nr == RX_BPSW_REGNUM) > - return rx_psw_type (gdbarch); > - else if (reg_nr == RX_FPSW_REGNUM) > - return rx_fpsw_type (gdbarch); > - else if (reg_nr == RX_ACC_REGNUM) > - return builtin_type (gdbarch)->builtin_unsigned_long_long; > - else > - return builtin_type (gdbarch)->builtin_unsigned_long; > -} > +/* RX register names */ > +static const char *const rx_register_names[] = { > + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", > + "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", > + "usp", "isp", "psw", "pc", "intb", "bpsw","bpc","fintv", > + "fpsw", "acc", > +}; > > > /* Function for finding saved registers in a 'struct pv_area'; this > @@ -1044,6 +944,8 @@ rx_gdbarch_init (struct gdbarch_info info, struct > gdbarch_list *arches) > struct gdbarch *gdbarch; > struct gdbarch_tdep *tdep; > int elf_flags; > + struct tdesc_arch_data *tdesc_data = NULL; > + const struct target_desc *tdesc = info.target_desc; > > /* Extract the elf_flags if available. */ > if (info.abfd != NULL > @@ -1065,16 +967,42 @@ rx_gdbarch_init (struct gdbarch_info info, > struct gdbarch_list *arches) > return arches->gdbarch; > } > > - /* None found, create a new architecture from the information > - provided. */ > + if (tdesc == NULL) > + tdesc = tdesc_rx; > + > + /* Check any target description for validity. */ > + if (tdesc_has_registers (tdesc)) > + { > + const struct tdesc_feature *feature; > + bool valid_p = true; > + > + feature = tdesc_find_feature (tdesc, "org.gnu.gdb.rx.core"); > + > + if (feature != NULL) > + { > + tdesc_data = tdesc_data_alloc (); > + for (int i = 0; i < RX_NUM_REGS; i++) > + valid_p &= tdesc_numbered_register (feature, tdesc_data, i, > + rx_register_names[i]); > + } > + > + if (!valid_p) > + { > + tdesc_data_cleanup (tdesc_data); > + return NULL; > + } > + } > + > + gdb_assert(tdesc_data != NULL); > + > tdep = XCNEW (struct gdbarch_tdep); > gdbarch = gdbarch_alloc (&info, tdep); > tdep->elf_flags = elf_flags; > > set_gdbarch_num_regs (gdbarch, RX_NUM_REGS); > + tdesc_use_registers (gdbarch, tdesc, tdesc_data); > + > set_gdbarch_num_pseudo_regs (gdbarch, 0); > - set_gdbarch_register_name (gdbarch, rx_register_name); > - set_gdbarch_register_type (gdbarch, rx_register_type); > set_gdbarch_pc_regnum (gdbarch, RX_PC_REGNUM); > set_gdbarch_sp_regnum (gdbarch, RX_SP_REGNUM); > set_gdbarch_inner_than (gdbarch, core_addr_lessthan); > @@ -1092,6 +1020,7 @@ rx_gdbarch_init (struct gdbarch_info info, > struct gdbarch_list *arches) > set_gdbarch_ptr_bit (gdbarch, 32); > set_gdbarch_float_bit (gdbarch, 32); > set_gdbarch_float_format (gdbarch, floatformats_ieee_single); > + > if (elf_flags & E_FLAG_RX_64BIT_DOUBLES) > { > set_gdbarch_double_bit (gdbarch, 64); > @@ -1132,4 +1061,5 @@ void > _initialize_rx_tdep (void) > { > register_gdbarch_init (bfd_arch_rx, rx_gdbarch_init); > + initialize_tdesc_rx (); > } Thanks, this LGTM, please push. Simon