From: Luis Machado via Gdb-patches <gdb-patches@sourceware.org>
To: Tom de Vries <tdevries@suse.de>, gdb-patches@sourceware.org
Cc: mark@klomp.org
Subject: Re: [PATCH] [Arm] Fix endianness handling for arm record self tests
Date: Mon, 15 Aug 2022 13:10:56 +0100 [thread overview]
Message-ID: <03f15a9d-e4ca-c0ec-8bd9-fa25ae37fb77@arm.com> (raw)
In-Reply-To: <6fe1ae85-a72a-e256-1c88-f9a9b303c0b8@suse.de>
On 8/9/22 10:43, Tom de Vries wrote:
> On 8/8/22 12:12, Luis Machado wrote:
>> The arm record tests handle 16-bit and 32-bit thumb instructions, but the
>> code is laid out in a way that handles the 32-bit thumb instructions as
>> two 16-bit parts.
>>
>> This is fine, but it is prone to host-endianness issues given how the two
>> 16-bit parts are stored and how they are accessed later on. Arm is
>> little-endian by default, so running this test with a GDB built with
>> --enable-targets=all and on a big endian host will run into the following:
>>
>> Running selftest arm-record.
>> Process record and replay target doesn't support syscall number -2036195
>> Process record does not support instruction 0x7f70ee1d at address 0x0.
>> Self test failed: self-test failed at ../../binutils-gdb/gdb/arm-tdep.c:14482
>>
>> Investigating this a bit further, there seems to be a chance to do a simple
>> fix through a type template, using uint16_t for 16-bit thumb instructions
>> and uint32_t for 32-bit thumb instructions.
>>
>> This patch implements this.
>>
>
> Hi Luis,
>
> LGTM.
>
> I noticed btw that this:
> ...
> diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c
> index 57b865a0819..1e6d9ba65be 100644
> --- a/gdb/arm-tdep.c
> +++ b/gdb/arm-tdep.c
> @@ -14489,6 +14489,29 @@ arm_record_test (void)
> SELF_CHECK (arm_record.reg_rec_count == 1);
> SELF_CHECK (arm_record.arm_regs[0] == 7);
> }
> +
> +
> + /* 32-bit instructions. */
> + {
> + arm_insn_decode_record arm_record;
> +
> + memset (&arm_record, 0, sizeof (arm_insn_decode_record));
> + arm_record.gdbarch = gdbarch;
> +
> + /* Use the endian-free representation of the instruction here. The test
> + will handle endianness conversions. */
> + static const uint32_t insns[] = {
> + /* mov r5, r0 */
> + 0xe1a05000,
> + };
> +
> + enum bfd_endian endian = gdbarch_byte_order_for_code (arm_record.gdbarch);
> + instruction_reader_thumb<uint32_t> reader (endian, insns);
> + int ret = decode_insn (reader, &arm_record, ARM_RECORD,
> + ARM_INSN_SIZE_BYTES);
> +
> + SELF_CHECK (ret == 0);
> + }
> }
>
> /* Instruction reader from manually cooked instruction sequences. */
> ...
> works fine, so I wonder if instruction_reader_thumb is a misnomer, perhaps we call it instruction_reader_selftest or some such, and add the arm32 insn to cover that case?
>
> Also I wondered if these checks
> ...
> SELF_CHECK (len == 4 || len == 2);
> SELF_CHECK (memaddr % 2 == 0);
> SELF_CHECK ((memaddr / 2) < m_insns_size);
> ...
> can be made more specific based on the template argument T.
Indeed. I've adjusted the patch now.
next prev parent reply other threads:[~2022-08-15 12:11 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-08 10:12 Luis Machado via Gdb-patches
2022-08-08 12:30 ` Andrew Burgess via Gdb-patches
2022-08-10 8:47 ` Andrew Burgess via Gdb-patches
2022-08-09 9:43 ` Tom de Vries via Gdb-patches
2022-08-09 9:57 ` Tom de Vries via Gdb-patches
2022-08-15 12:13 ` Luis Machado via Gdb-patches
2022-08-09 11:31 ` Luis Machado via Gdb-patches
2022-08-09 11:48 ` Tom de Vries via Gdb-patches
2022-08-09 12:08 ` Tom de Vries via Gdb-patches
2022-08-09 12:09 ` Luis Machado via Gdb-patches
2022-08-09 12:13 ` Tom de Vries via Gdb-patches
2022-08-09 15:24 ` Mark Wielaard
2022-08-15 12:10 ` Luis Machado via Gdb-patches [this message]
2022-08-23 20:32 ` [PATCH,v2] " Luis Machado via Gdb-patches
2022-09-01 9:29 ` [PING][PATCH,v2] " Luis Machado via Gdb-patches
2022-09-06 10:39 ` Tom de Vries via Gdb-patches
2022-09-07 8:19 ` Luis Machado via Gdb-patches
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