From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30500 invoked by alias); 11 Dec 2004 18:06:24 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 30492 invoked from network); 11 Dec 2004 18:06:22 -0000 Received: from unknown (HELO balder.inter.net.il) (192.114.186.15) by sourceware.org with SMTP; 11 Dec 2004 18:06:22 -0000 Received: from zaretski (pns03-203-109.inter.net.il [80.230.203.109]) by balder.inter.net.il (Mirapoint Messaging Server MOS 3.3.7-GR) with ESMTP id DXB87893 (AUTH halo1); Sat, 11 Dec 2004 20:05:23 +0200 (IST) Date: Sat, 11 Dec 2004 18:07:00 -0000 From: "Eli Zaretskii" To: Daniel Jacobowitz Message-ID: <01c4dfac$Blat.v2.2.2$25d806e0@zahav.net.il> Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=ISO-8859-1 CC: kettenis@gnu.org, jjohnstn@redhat.com, gdb-patches@sources.redhat.com In-reply-to: <20041211173757.GB15506@nevyn.them.org> (message from Daniel Jacobowitz on Sat, 11 Dec 2004 12:37:57 -0500) Subject: Re: [RFA]: Modified Watchthreads Patch Reply-to: Eli Zaretskii References: <41B8E16D.6070505@redhat.com> <20041210191015.GA18430@nevyn.them.org> <01c4df0c$Blat.v2.2.2$244dda20@zahav.net.il> <20041210230603.GA23419@nevyn.them.org> <01c4df10$Blat.v2.2.2$6f63d1a0@zahav.net.il> <20041210233700.GA24439@nevyn.them.org> <01c4df73$Blat.v2.2.2$5e13b740@zahav.net.il> <200412111433.iBBEXqpN007235@elgar.sibelius.xs4all.nl> <20041211163652.GB13865@nevyn.them.org> <01c4dfa6$Blat.v2.2.2$d4763ba0@zahav.net.il> <20041211173757.GB15506@nevyn.them.org> X-SW-Source: 2004-12/txt/msg00311.txt.bz2 > Date: Sat, 11 Dec 2004 12:37:57 -0500 > From: Daniel Jacobowitz > Cc: kettenis@gnu.org, jjohnstn@redhat.com, gdb-patches@sources.redhat.com > > For the Linux kernel, it doesn't matter what you set in that bit. It > has to clear the registers at task switch anyway, for security reasons. This might mean that, in practice, we will need to have some GDB code to produce an illusion of thread-specific watchpoints on the x86. That is, the hardware will stop the inferior whenever _any_ thread hits the watchtpoint, and then GDB will take control, and figure out whether it needs to stop or continue.