diff -Naur insight-5.3.orig/gdb/config/m32r/m32r.mt insight-5.3.new/gdb/config/m32r/m32r.mt
--- insight-5.3.orig/gdb/config/m32r/m32r.mt	Sun May  5 00:52:39 2002
+++ insight-5.3.new/gdb/config/m32r/m32r.mt	Fri May  9 11:28:38 2003
@@ -1,5 +1,4 @@
 # Target: Mitsubishi m32r processor
 TDEPFILES= m32r-tdep.o monitor.o m32r-rom.o dsrec.o
-TM_FILE= tm-m32r.h
 SIM_OBS = remote-sim.o
 SIM = ../sim/m32r/libsim.a
diff -Naur insight-5.3.orig/gdb/config/m32r/tm-m32r.h insight-5.3.new/gdb/config/m32r/tm-m32r.h
--- insight-5.3.orig/gdb/config/m32r/tm-m32r.h	Sat Aug 24 09:21:35 2002
+++ insight-5.3.new/gdb/config/m32r/tm-m32r.h	Thu Jan  1 09:00:00 1970
@@ -1,234 +0,0 @@
-/* Parameters for execution on a Mitsubishi m32r processor.
-   Copyright 1996, 1997 Free Software Foundation, Inc. 
-
-   This file is part of GDB.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 59 Temple Place - Suite 330,
-   Boston, MA 02111-1307, USA.  */
-
-#include "regcache.h"
-
-/* Used by mswin.  */
-#define TARGET_M32R 1
-
-/* mvs_check REGISTER_NAMES */
-#define REGISTER_NAMES \
-{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
-  "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp", \
-  "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch", \
-    /*  "cond", "sm", "bsm", "ie", "bie", "bcarry",  */ \
-}
-/* mvs_check  NUM_REGS */
-#define NUM_REGS 			24
-
-/* mvs_check  REGISTER_SIZE */
-#define REGISTER_SIZE 			4
-/* mvs_check  MAX_REGISTER_RAW_SIZE */
-#define MAX_REGISTER_RAW_SIZE		4
-
-/* mvs_check  *_REGNUM */
-#define R0_REGNUM	0
-#define STRUCT_RETURN_REGNUM 0
-#define ARG0_REGNUM	0
-#define ARGLAST_REGNUM	3
-#define V0_REGNUM	0
-#define V1_REGNUM	1
-#define FP_REGNUM	13
-#define RP_REGNUM	14
-#define SP_REGNUM	15
-#define PSW_REGNUM	16
-#define CBR_REGNUM	17
-#define SPI_REGNUM	18
-#define SPU_REGNUM	19
-#define BPC_REGNUM	20
-#define PC_REGNUM	21
-#define ACCL_REGNUM	22
-#define ACCH_REGNUM	23
-
-/* mvs_check  REGISTER_BYTES */
-#define REGISTER_BYTES			(NUM_REGS * 4)
-
-/* mvs_check  REGISTER_VIRTUAL_TYPE */
-#define REGISTER_VIRTUAL_TYPE(REG)	builtin_type_int
-
-/* mvs_check  REGISTER_BYTE */
-#define REGISTER_BYTE(REG) 		((REG) * 4)
-/* mvs_check  REGISTER_VIRTUAL_SIZE */
-#define REGISTER_VIRTUAL_SIZE(REG) 	4
-/* mvs_check  REGISTER_RAW_SIZE */
-#define REGISTER_RAW_SIZE(REG)     	4
-
-/* mvs_check  MAX_REGISTER_VIRTUAL_SIZE */
-#define MAX_REGISTER_VIRTUAL_SIZE 	4
-
-/* mvs_check  BREAKPOINT */
-#define BREAKPOINT {0x10, 0xf1}
-
-/* mvs_no_check  FUNCTION_START_OFFSET */
-#define FUNCTION_START_OFFSET 0
-
-/* mvs_check  DECR_PC_AFTER_BREAK */
-#define DECR_PC_AFTER_BREAK 0
-
-/* mvs_check  INNER_THAN */
-#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
-
-/* mvs_check  SAVED_PC_AFTER_CALL */
-#define SAVED_PC_AFTER_CALL(fi) read_register (RP_REGNUM)
-
-struct frame_info;
-struct frame_saved_regs;
-struct type;
-struct value;
-
-/* Define other aspects of the stack frame. 
-   We keep the offsets of all saved registers, 'cause we need 'em a lot!
-   We also keep the current size of the stack frame, and whether 
-   the frame pointer is valid (for frameless functions, and when we're
-   still in the prologue of a function with a frame) */
-
-/* mvs_check  EXTRA_FRAME_INFO */
-#define EXTRA_FRAME_INFO  	\
-  struct frame_saved_regs fsr;	\
-  int framesize;		\
-  int using_frame_pointer;
-
-
-extern void m32r_init_extra_frame_info (struct frame_info *fi);
-/* mvs_check  INIT_EXTRA_FRAME_INFO */
-#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) m32r_init_extra_frame_info (fi)
-/* mvs_no_check  INIT_FRAME_PC */
-#define INIT_FRAME_PC		/* Not necessary */
-
-extern void
-m32r_frame_find_saved_regs (struct frame_info *fi,
-			    struct frame_saved_regs *regaddr);
-
-/* Put here the code to store, into a struct frame_saved_regs,
-   the addresses of the saved registers of frame described by FRAME_INFO.
-   This includes special registers such as pc and fp saved in special
-   ways in the stack frame.  sp is even more special:
-   the address we return for it IS the sp for the next frame.  */
-
-/* mvs_check  FRAME_FIND_SAVED_REGS */
-#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs)	    \
-   m32r_frame_find_saved_regs(frame_info, &(frame_saved_regs))
-
-extern CORE_ADDR m32r_frame_chain (struct frame_info *fi);
-/* mvs_check  FRAME_CHAIN */
-#define FRAME_CHAIN(fi) 		m32r_frame_chain (fi)
-
-#define FRAME_CHAIN_VALID(fp, frame)	generic_file_frame_chain_valid (fp, frame)
-
-extern CORE_ADDR m32r_find_callers_reg (struct frame_info *fi, int regnum);
-extern CORE_ADDR m32r_frame_saved_pc (struct frame_info *);
-/* mvs_check  FRAME_SAVED_PC */
-#define FRAME_SAVED_PC(fi)		m32r_frame_saved_pc (fi)
-
-/* mvs_check  DEPRECATED_EXTRACT_RETURN_VALUE */
-#define DEPRECATED_EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
-  memcpy ((VALBUF), \
-	  (char *)(REGBUF) + REGISTER_BYTE (V0_REGNUM) + \
-	  ((TYPE_LENGTH (TYPE) > 4 ? 8 : 4) - TYPE_LENGTH (TYPE)), \
-	  TYPE_LENGTH (TYPE))
-
-/* mvs_check  DEPRECATED_STORE_RETURN_VALUE */
-#define DEPRECATED_STORE_RETURN_VALUE(TYPE, VALBUF) \
-  write_register_bytes(REGISTER_BYTE (V0_REGNUM) + \
-		       ((TYPE_LENGTH (TYPE) > 4 ? 8:4) - TYPE_LENGTH (TYPE)),\
-		       (VALBUF), TYPE_LENGTH (TYPE));
-
-extern CORE_ADDR m32r_skip_prologue (CORE_ADDR pc);
-/* mvs_check  SKIP_PROLOGUE */
-#define SKIP_PROLOGUE(pc) (m32r_skip_prologue (pc))
-
-/* mvs_no_check  FRAME_ARGS_SKIP */
-#define FRAME_ARGS_SKIP 0
-
-/* mvs_no_check  FRAME_ARGS_ADDRESS */
-#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
-/* mvs_no_check  FRAME_LOCALS_ADDRESS */
-#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
-/* mvs_no_check  FRAME_NUM_ARGS */
-#define FRAME_NUM_ARGS(fi) (-1)
-
-#define COERCE_FLOAT_TO_DOUBLE(formal, actual) (1)
-
-extern void m32r_write_sp (CORE_ADDR val);
-#define TARGET_WRITE_SP m32r_write_sp
-
-
-
-
-
-
-/* struct passing and returning stuff */
-#define STORE_STRUCT_RETURN(STRUCT_ADDR, SP)	\
-	write_register (0, STRUCT_ADDR)
-
-extern use_struct_convention_fn m32r_use_struct_convention;
-#define USE_STRUCT_CONVENTION(GCC_P, TYPE) m32r_use_struct_convention (GCC_P, TYPE)
-
-#define DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
-  extract_address (REGBUF + REGISTER_BYTE (V0_REGNUM), \
-		   REGISTER_RAW_SIZE (V0_REGNUM))
-
-#define REG_STRUCT_HAS_ADDR(gcc_p,type)     (TYPE_LENGTH (type) > 8)
-
-
-/* generic dummy frame stuff */
-
-#define PUSH_DUMMY_FRAME             generic_push_dummy_frame ()
-#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP)
-
-
-/* target-specific dummy_frame stuff */
-
-extern struct frame_info *m32r_pop_frame (struct frame_info *frame);
-/* mvs_check  POP_FRAME */
-#define POP_FRAME m32r_pop_frame (get_current_frame ())
-
-/* mvs_no_check  STACK_ALIGN */
-/* #define STACK_ALIGN(x) ((x + 3) & ~3) */
-
-extern CORE_ADDR m32r_push_return_address (CORE_ADDR, CORE_ADDR);
-extern CORE_ADDR m32r_push_arguments (int nargs,
-				      struct value **args,
-				      CORE_ADDR sp,
-				      unsigned char struct_return,
-				      CORE_ADDR struct_addr);
-
-
-
-/* mvs_no_check  PUSH_ARGUMENTS */
-#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
-  (m32r_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR))
-
-#define PUSH_RETURN_ADDRESS(PC, SP)      m32r_push_return_address (PC, SP)
-
-/* override the standard get_saved_register function with 
-   one that takes account of generic CALL_DUMMY frames */
-#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
-     generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
-
-
-#define USE_GENERIC_DUMMY_FRAMES 1
-#define CALL_DUMMY                   {0}
-#define CALL_DUMMY_LENGTH            (0)
-#define CALL_DUMMY_START_OFFSET      (0)
-#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
-#define FIX_CALL_DUMMY(DUMMY1, STARTADDR, FUNADDR, NARGS, ARGS, TYPE, GCCP)
-#define CALL_DUMMY_LOCATION          AT_ENTRY_POINT
-#define CALL_DUMMY_ADDRESS()         entry_point_address ()
diff -Naur insight-5.3.orig/gdb/configure.tgt insight-5.3.new/gdb/configure.tgt
--- insight-5.3.orig/gdb/configure.tgt	Sun Oct 20 21:14:39 2002
+++ insight-5.3.new/gdb/configure.tgt	Fri May  9 11:27:57 2003
@@ -303,6 +303,7 @@
 
 case "${gdb_target}" in
 d10v)		gdb_multi_arch=yes ;;
+m32r)		gdb_multi_arch=yes ;;
 m68hc11)	gdb_multi_arch=yes ;;
 mn10300)	gdb_multi_arch=yes ;;
 x86-64linux)    gdb_multi_arch=yes ;;
diff -Naur insight-5.3.orig/gdb/m32r-rom.c insight-5.3.new/gdb/m32r-rom.c
--- insight-5.3.orig/gdb/m32r-rom.c	Mon Jun 11 01:25:51 2001
+++ insight-5.3.new/gdb/m32r-rom.c	Fri May  9 11:29:37 2003
@@ -57,6 +57,14 @@
 static char *download_path;	/* user-settable path for SREC files     */
 
 
+/* REGNUM */
+#define PSW_REGNUM      16
+#define SPI_REGNUM      18
+#define SPU_REGNUM      19
+#define ACCL_REGNUM     22
+#define ACCH_REGNUM     23
+
+
 /* 
  * Function: m32r_load_1 (helper function)
  */
diff -Naur insight-5.3.orig/gdb/m32r-tdep.c insight-5.3.new/gdb/m32r-tdep.c
--- insight-5.3.orig/gdb/m32r-tdep.c	Tue Jul 30 01:34:06 2002
+++ insight-5.3.new/gdb/m32r-tdep.c	Fri May  9 11:30:27 2003
@@ -28,6 +28,67 @@
 #include "gdbcore.h"
 #include "symfile.h"
 #include "regcache.h"
+#include "arch-utils.h"
+
+
+struct gdbarch_tdep
+{
+  /* gdbarch target dependent data here. Currently unused for M32R. */
+};
+
+
+#define ARG0_REGNUM     0
+#define ARGLAST_REGNUM  3
+#define RP_REGNUM       14
+#define PSW_REGNUM      16
+#define SPI_REGNUM      18
+#define SPU_REGNUM      19
+
+ char *m32r_register_names[] =
+{
+  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+  "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp",
+  "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch",
+  "evb"
+};
+
+static int 
+m32r_num_regs (void)
+{
+  return (sizeof (m32r_register_names));
+}
+
+static const char *
+m32r_register_name (int reg_nr)
+{
+  if (reg_nr < 0)
+    return NULL;
+  if (reg_nr >= (sizeof (m32r_register_names) / sizeof (*m32r_register_names)))
+    return NULL;
+  return m32r_register_names[reg_nr];
+}
+
+static CORE_ADDR
+m32r_saved_pc_after_call (struct frame_info *frame)
+{
+  return read_register (14);
+}
+
+
+/* Additional info used by the frame */
+
+struct frame_saved_regs
+{
+  CORE_ADDR regs[(sizeof (m32r_register_names) / sizeof (*m32r_register_names))];
+};
+
+struct frame_extra_info
+{
+  struct frame_saved_regs fsr;
+  int framesize;
+  int using_frame_pointer;
+};
+
 
 /* Function: m32r_use_struct_convention
    Return nonzero if call_function should allocate stack space for a
@@ -38,16 +99,14 @@
   return (TYPE_LENGTH (type) > 8);
 }
 
-/* Function: frame_find_saved_regs
+/* Function: frame_init_saved_regs
    Return the frame_saved_regs structure for the frame.
    Doesn't really work for dummy frames, but it does pass back
    an empty frame_saved_regs, so I guess that's better than total failure */
 
 void
-m32r_frame_find_saved_regs (struct frame_info *fi,
-			    struct frame_saved_regs *regaddr)
+m32r_frame_init_saved_regs (struct frame_info *fi)
 {
-  memcpy (regaddr, &fi->fsr, sizeof (struct frame_saved_regs));
 }
 
 /* Turn this on if you want to see just how much instruction decoding
@@ -95,7 +154,6 @@
 
    These instructions are scheduled like everything else, so you should stop at
    the first branch instruction.
-
  */
 
 /* This is required by skip prologue and by m32r_init_extra_frame_info. 
@@ -106,7 +164,7 @@
  */
 
 static void
-decode_prologue (CORE_ADDR start_pc, CORE_ADDR scan_limit, CORE_ADDR *pl_endptr,	/* var parameter */
+decode_prologue (CORE_ADDR start_pc, CORE_ADDR scan_limit, CORE_ADDR *pl_endptr,
 		 unsigned long *framelength, struct frame_info *fi,
 		 struct frame_saved_regs *fsr)
 {
@@ -125,25 +183,28 @@
 
   for (current_pc = start_pc; current_pc < scan_limit; current_pc += 2)
     {
-
       insn = read_memory_unsigned_integer (current_pc, 2);
       dump_insn ("insn-1", current_pc, insn);	/* MTZ */
 
       /* If this is a 32 bit instruction, we dont want to examine its
          immediate data as though it were an instruction */
       if (current_pc & 0x02)
-	{			/* Clear the parallel execution bit from 16 bit instruction */
+	{
+          /* Clear the parallel execution bit from 16 bit instruction */
 	  if (maybe_one_more)
-	    {			/* The last instruction was a branch, usually terminates
-				   the series, but if this is a parallel instruction,
-				   it may be a stack framing instruction */
+	    {
+              /* The last instruction was a branch, usually terminates
+	         the series, but if this is a parallel instruction,
+		 it may be a stack framing instruction */
 	      if (!(insn & 0x8000))
 		{
 		  insn_debug (("Really done"));
-		  break;	/* nope, we are really done */
+                  /* nope, we are really done */
+		  break;
 		}
 	    }
-	  insn &= 0x7fff;	/* decode this instruction further */
+ 	  /* decode this instruction further */
+	  insn &= 0x7fff;
 	}
       else
 	{
@@ -186,9 +247,9 @@
 	{			/* st reg, @-sp */
 	  int regno;
 	  insn_debug (("push\n"));
-#if 0				/* No, PUSH FP is not an indication that we will use a frame pointer. */
+#if 0	/* No, PUSH FP is not an indication that we will use a frame pointer. */
 	  if (((insn & 0xffff) == 0x2d7f) && fi)
-	    fi->using_frame_pointer = 1;
+	    fi->extra_info->using_frame_pointer = 1;
 #endif
 	  framesize += 4;
 #if 0
@@ -227,12 +288,13 @@
       if (insn == 0x1d8f)
 	{			/* mv fp, sp */
 	  if (fi)
-	    fi->using_frame_pointer = 1;	/* fp is now valid */
+	    fi->extra_info->using_frame_pointer = 1;	/* fp is now valid */
 	  insn_debug (("done fp found\n"));
 	  after_prologue = current_pc + 2;
 	  break;		/* end of stack adjustments */
 	}
-      if (insn == 0x7000)	/* Nop looks like a branch, continue explicitly */
+      /* Nop looks like a branch, continue explicitly */
+      if (insn == 0x7000)
 	{
 	  insn_debug (("nop\n"));
 	  after_prologue = current_pc + 2;
@@ -313,7 +375,6 @@
 
       if (sal.line != 0 && sal.end <= func_end)
 	{
-
 	  insn_debug (("BP after prologue %08x\n", sal.end));
 	  func_end = sal.end;
 	}
@@ -377,43 +438,46 @@
    examine the prologue.  */
 
 void
-m32r_init_extra_frame_info (struct frame_info *fi)
+m32r_init_extra_frame_info (int fromleaf, struct frame_info *fi)
 {
   int reg;
 
   if (fi->next)
     fi->pc = FRAME_SAVED_PC (fi->next);
 
-  memset (fi->fsr.regs, '\000', sizeof fi->fsr.regs);
+  fi->extra_info = (struct frame_extra_info *)
+    frame_obstack_alloc (sizeof (struct frame_extra_info));
+
+  memset (fi->extra_info->fsr.regs, '\000', sizeof fi->extra_info->fsr.regs);
 
   if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
     {
       /* We need to setup fi->frame here because run_stack_dummy gets it wrong
          by assuming it's always FP.  */
       fi->frame = generic_read_register_dummy (fi->pc, fi->frame, SP_REGNUM);
-      fi->framesize = 0;
+      fi->extra_info->framesize = 0;
       return;
     }
   else
     {
-      fi->using_frame_pointer = 0;
-      fi->framesize = m32r_scan_prologue (fi, &fi->fsr);
+      fi->extra_info->using_frame_pointer = 0;
+      fi->extra_info->framesize = m32r_scan_prologue (fi, &fi->extra_info->fsr);
 
       if (!fi->next)
-	if (fi->using_frame_pointer)
-	  {
-	    fi->frame = read_register (FP_REGNUM);
-	  }
+	if (fi->extra_info->using_frame_pointer)
+	  fi->frame = read_register (FP_REGNUM);
 	else
 	  fi->frame = read_register (SP_REGNUM);
       else
-	/* fi->next means this is not the innermost frame */ if (fi->using_frame_pointer)
+	/* fi->next means this is not the innermost frame */
+        if (fi->extra_info->using_frame_pointer)
 	/* we have an FP */
-	if (fi->next->fsr.regs[FP_REGNUM] != 0)		/* caller saved our FP */
-	  fi->frame = read_memory_integer (fi->next->fsr.regs[FP_REGNUM], 4);
+	if (fi->next->extra_info->fsr.regs[FP_REGNUM] != 0)	/* caller saved our FP */
+	  fi->frame = read_memory_integer (fi->next->extra_info->fsr.regs[FP_REGNUM], 4);
       for (reg = 0; reg < NUM_REGS; reg++)
-	if (fi->fsr.regs[reg] != 0)
-	  fi->fsr.regs[reg] = fi->frame + fi->framesize - fi->fsr.regs[reg];
+	if (fi->extra_info->fsr.regs[reg] != 0)
+	  fi->extra_info->fsr.regs[reg] =
+            fi->frame + fi->extra_info->framesize - fi->extra_info->fsr.regs[reg];
     }
 }
 
@@ -434,20 +498,44 @@
   fi.pc = pc;
 
   /* Analyze the prolog and fill in the extra info.  */
-  m32r_init_extra_frame_info (&fi);
-
+  m32r_init_extra_frame_info (0, &fi);
 
   /* Results will tell us which type of frame it uses.  */
-  if (fi.using_frame_pointer)
-    {
-      *reg = FP_REGNUM;
-      *offset = 0;
-    }
+  if (fi.extra_info->using_frame_pointer)
+    *reg = FP_REGNUM;
   else
-    {
-      *reg = SP_REGNUM;
-      *offset = 0;
-    }
+    *reg = SP_REGNUM;
+  *offset = 0;
+}
+
+static int
+m32r_reg_struct_has_addr (int gcc_p, struct type *type)
+{
+  return (TYPE_LENGTH (type) > 8);
+}
+
+static struct type *
+m32r_register_virtual_type (int reg)
+{
+  return builtin_type_int;
+}
+
+static int
+m32r_register_byte (int reg)
+{
+  return (reg * 4);
+}
+
+static int
+m32r_register_virtual_size (int reg)
+{
+  return 4;
+}
+
+static int
+m32r_register_raw_size (int reg)
+{
+  return 4;
 }
 
 /* Function: find_callers_reg
@@ -463,8 +551,8 @@
   for (; fi; fi = fi->next)
     if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
       return generic_read_register_dummy (fi->pc, fi->frame, regnum);
-    else if (fi->fsr.regs[regnum] != 0)
-      return read_memory_integer (fi->fsr.regs[regnum],
+    else if (fi->extra_info->fsr.regs[regnum] != 0)
+      return read_memory_integer (fi->extra_info->fsr.regs[regnum],
 				  REGISTER_RAW_SIZE (regnum));
   return read_register (regnum);
 }
@@ -482,26 +570,26 @@
 
   /* is this a dummy frame? */
   if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
-    return fi->frame;		/* dummy frame same as caller's frame */
+    return fi->frame;	/* dummy frame same as caller's frame */
 
   /* is caller-of-this a dummy frame? */
   callers_pc = FRAME_SAVED_PC (fi);	/* find out who called us: */
   fp = m32r_find_callers_reg (fi, FP_REGNUM);
   if (PC_IN_CALL_DUMMY (callers_pc, fp, fp))
-    return fp;			/* dummy frame's frame may bear no relation to ours */
+    return fp;		/* dummy frame's frame may bear no relation to ours */
 
   if (find_pc_partial_function (fi->pc, 0, &fn_start, 0))
     if (fn_start == entry_point_address ())
-      return 0;			/* in _start fn, don't chain further */
-  if (fi->framesize == 0)
+      return 0;		/* in _start fn, don't chain further */
+  if (fi->extra_info->framesize == 0)
     {
       printf_filtered ("cannot determine frame size @ %s , pc(%s)\n",
 		       paddr (fi->frame),
 		       paddr (fi->pc));
       return 0;
     }
-  insn_debug (("m32rx frame %08x\n", fi->frame + fi->framesize));
-  return fi->frame + fi->framesize;
+  insn_debug (("m32rx frame %08x\n", fi->frame + fi->extra_info->framesize));
+  return fi->frame + fi->extra_info->framesize;
 }
 
 /* Function: push_return_address (pc)
@@ -516,13 +604,11 @@
   return sp;
 }
 
+/* Discard from the stack the innermost frame, restoring all saved
+   registers.  */
 
-/* Function: pop_frame
-   Discard from the stack the innermost frame,
-   restoring all saved registers.  */
-
-struct frame_info *
-m32r_pop_frame (struct frame_info *frame)
+static void
+do_m32r_pop_frame (struct frame_info *frame)
 {
   int regnum;
 
@@ -531,9 +617,9 @@
   else
     {
       for (regnum = 0; regnum < NUM_REGS; regnum++)
-	if (frame->fsr.regs[regnum] != 0)
+	if (frame->extra_info->fsr.regs[regnum] != 0)
 	  write_register (regnum,
-			  read_memory_integer (frame->fsr.regs[regnum], 4));
+			  read_memory_integer (frame->extra_info->fsr.regs[regnum], 4));
 
       write_register (PC_REGNUM, FRAME_SAVED_PC (frame));
       write_register (SP_REGNUM, read_register (FP_REGNUM));
@@ -543,7 +629,12 @@
 	write_register (SPI_REGNUM, read_register (SP_REGNUM));
     }
   flush_cached_frames ();
-  return NULL;
+}
+
+static void
+m32r_pop_frame (void)
+{
+  generic_pop_current_frame (do_m32r_pop_frame);
 }
 
 /* Function: frame_saved_pc
@@ -562,7 +653,7 @@
 /* Function: push_arguments
    Setup the function arguments for calling a function in the inferior.
 
-   On the Mitsubishi M32R architecture, there are four registers (R0 to R3)
+   On the Renesas M32R architecture, there are four registers (R0 to R3)
    which are dedicated for passing function arguments.  Up to the first 
    four arguments (depending on size) may go into these registers.
    The rest go on the stack.
@@ -590,9 +681,9 @@
    the callee to copy the return value to.  A pointer to this space is
    passed as an implicit first argument, always in R0. */
 
-CORE_ADDR
+static CORE_ADDR
 m32r_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
-		     unsigned char struct_return, CORE_ADDR struct_addr)
+		     int struct_return, CORE_ADDR struct_addr)
 {
   int stack_offset, stack_alloc;
   int argreg;
@@ -697,8 +788,252 @@
   write_register (SP_REGNUM, val);
 }
 
+
+/* BREAKPOINT */
+#define M32R_BE_BREAKPOINT32 {0x10, 0xf1, 0x70, 0x00}
+#define M32R_LE_BREAKPOINT32 {0xf1, 0x10, 0x00, 0x70}
+#define M32R_BE_BREAKPOINT16 {0x10, 0xf1}
+#define M32R_LE_BREAKPOINT16 {0xf1, 0x10}
+
+static int
+m32r_memory_insert_breakpoint(CORE_ADDR addr, char *contents_cache)
+{
+  int val;
+  unsigned char *bp;
+  int bplen;
+
+  bplen = (addr & 3)?  2 : 4;
+
+  /* Save the memory contents.  */
+  val = target_read_memory (addr, contents_cache, bplen); 
+  if (val != 0) return val;	/* return error */
+
+  /* Determine appropriate breakpoint contents and size for this address.  */
+  if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) {
+	if (((addr & 3) == 0) &&
+	    ((contents_cache[0] & 0x80) || (contents_cache[2] & 0x80))) {
+		static unsigned char insn[] = M32R_BE_BREAKPOINT32;
+		bp = insn;
+		bplen = sizeof(insn);
+	} else {
+		static unsigned char insn[] = M32R_BE_BREAKPOINT16;
+		bp = insn;
+		bplen = sizeof(insn);
+	}
+  } else {		/* little-endian */
+	if (((addr & 3) == 0) &&
+	    ((contents_cache[1] & 0x80) || (contents_cache[3] & 0x80))) {
+		static unsigned char insn[] = M32R_LE_BREAKPOINT32;
+		bp = insn;
+		bplen = sizeof(insn);
+	} else {
+		static unsigned char insn[] = M32R_LE_BREAKPOINT16;
+		bp = insn;
+		bplen = sizeof(insn);
+	}
+  }
+  /* Write the breakpoint.  */
+  val = target_write_memory (addr, (char *) bp, bplen);
+  return val;
+}
+
+static int
+m32r_memory_remove_breakpoint(CORE_ADDR addr, char *contents_cache)
+{
+  int val;
+  int bplen;
+
+  /* Determine appropriate breakpoint contents and size for this address.  */
+  if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) {
+	if (((addr & 3) == 0) &&
+	    ((contents_cache[0] & 0x80) || (contents_cache[2] & 0x80))) {
+		static unsigned char insn[] = M32R_BE_BREAKPOINT32;
+		bplen = sizeof(insn);
+	} else {
+		static unsigned char insn[] = M32R_BE_BREAKPOINT16;
+		bplen = sizeof(insn);
+	}
+  } else {		/* little-endian */
+	if (((addr & 3) == 0) &&
+	    ((contents_cache[1] & 0x80) || (contents_cache[3] & 0x80))) {
+		static unsigned char insn[] = M32R_BE_BREAKPOINT32;
+		bplen = sizeof(insn);
+	} else {
+		static unsigned char insn[] = M32R_BE_BREAKPOINT16;
+		bplen = sizeof(insn);
+	}
+  }
+  /* Write contents.  */
+  val = target_write_memory (addr, contents_cache, bplen);
+  return val;
+}
+
+static const unsigned char *
+m32r_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
+{
+  unsigned char *bp;
+
+  /* Determine appropriate breakpoint.  */
+  if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+    {
+      if ((*pcptr & 3) == 0)
+        {
+          static unsigned char insn[] = M32R_BE_BREAKPOINT32;
+          bp = insn;
+          *lenptr = sizeof(insn);
+        }
+      else
+        {
+          static unsigned char insn[] = M32R_BE_BREAKPOINT16;
+          bp = insn;
+          *lenptr = sizeof(insn);
+        }
+    }
+  else
+    {
+      if ((*pcptr & 3) == 0)
+        {
+          static unsigned char insn[] = M32R_LE_BREAKPOINT32;
+          bp = insn;
+          *lenptr = sizeof(insn);
+        }
+      else
+        {
+          static unsigned char insn[] = M32R_LE_BREAKPOINT16;
+          bp = insn;
+          *lenptr = sizeof(insn);
+        }
+    }
+
+  return bp;
+}
+
+
+static void
+m32r_extract_return_value (struct type *type, char regbuf[REGISTER_BYTES],
+                           char *valbuf)
+{
+  memcpy (valbuf,
+          regbuf + REGISTER_BYTE (0)
+            + ((TYPE_LENGTH (type) > 4 ? 8 : 4) - TYPE_LENGTH (type)),
+          TYPE_LENGTH (type));
+}
+
+static void
+m32r_store_return_value (struct type *type, char *valbuf)
+{
+  write_register_bytes(REGISTER_BYTE (0) + ((TYPE_LENGTH (type) > 4 ? 8:4)
+                         - TYPE_LENGTH (type)),
+                       valbuf, TYPE_LENGTH (type));
+}
+
+static void
+m32r_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
+{
+  write_register (0, addr);
+}
+
+static CORE_ADDR
+m32r_extract_struct_value_address (char *regbuf)
+{
+  return (extract_address (regbuf + REGISTER_BYTE (0), REGISTER_RAW_SIZE (0)));
+}
+
+
+static gdbarch_init_ftype m32r_gdbarch_init;
+
+static struct gdbarch *
+m32r_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+{
+  static LONGEST m32r_call_dummy_words[] = { 0 };
+  struct gdbarch_tdep *tdep;
+  struct gdbarch *gdbarch;
+
+  /* Find a candidate among the list of pre-declared architectures. */
+  arches = gdbarch_list_lookup_by_info (arches, &info);
+  if (arches != NULL)
+    return arches->gdbarch;
+
+  /* None found, create a new architecture from the information provided. */
+  tdep = XMALLOC (struct gdbarch_tdep);
+  gdbarch = gdbarch_alloc (&info, tdep);
+
+  /* Registers.  */
+  set_gdbarch_num_regs (gdbarch, m32r_num_regs());
+  set_gdbarch_register_name (gdbarch, m32r_register_name);
+  set_gdbarch_register_size (gdbarch, 4);
+  set_gdbarch_register_bytes (gdbarch, 4 * m32r_num_regs());
+  set_gdbarch_register_byte (gdbarch, m32r_register_byte);
+  set_gdbarch_register_raw_size (gdbarch, m32r_register_raw_size);
+  set_gdbarch_max_register_raw_size (gdbarch, 4);
+  set_gdbarch_register_virtual_size (gdbarch, m32r_register_virtual_size);
+  set_gdbarch_max_register_virtual_size (gdbarch, 4);
+  set_gdbarch_register_virtual_type (gdbarch, m32r_register_virtual_type);
+  set_gdbarch_sp_regnum (gdbarch, 15);
+  set_gdbarch_pc_regnum (gdbarch, 21);
+  set_gdbarch_fp_regnum (gdbarch, 13);
+  set_gdbarch_write_sp (gdbarch, m32r_write_sp);
+
+  /* Frame Info.  */
+  set_gdbarch_get_saved_register (gdbarch, generic_unwind_get_saved_register);
+  set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
+  set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
+  set_gdbarch_saved_pc_after_call (gdbarch, m32r_saved_pc_after_call);
+  set_gdbarch_init_extra_frame_info (gdbarch, m32r_init_extra_frame_info);
+  set_gdbarch_frame_init_saved_regs (gdbarch, m32r_frame_init_saved_regs);
+  set_gdbarch_frame_chain (gdbarch, m32r_frame_chain);
+  set_gdbarch_frame_saved_pc (gdbarch, m32r_frame_saved_pc);
+  set_gdbarch_deprecated_extract_return_value (gdbarch, m32r_extract_return_value);
+  set_gdbarch_deprecated_extract_struct_value_address
+    (gdbarch, m32r_extract_struct_value_address);
+  set_gdbarch_deprecated_store_return_value (gdbarch, m32r_store_return_value);
+  set_gdbarch_store_struct_return (gdbarch, m32r_store_struct_return);
+  set_gdbarch_pop_frame (gdbarch, m32r_pop_frame);
+  set_gdbarch_skip_prologue (gdbarch, m32r_skip_prologue);
+  set_gdbarch_frame_args_skip (gdbarch, 0);
+  set_gdbarch_frame_args_address (gdbarch, default_frame_address);
+  set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
+  set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
+
+  /* Calling functions in the inferior from GDB.  */
+  set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
+  set_gdbarch_call_dummy_length (gdbarch, 0);
+  set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
+  set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
+  set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
+  set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
+  set_gdbarch_call_dummy_start_offset (gdbarch, 0);
+  set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
+  set_gdbarch_call_dummy_words (gdbarch, m32r_call_dummy_words);
+  set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (m32r_call_dummy_words));
+  set_gdbarch_call_dummy_p (gdbarch, 1);
+  set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
+  set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
+  set_gdbarch_push_arguments (gdbarch, m32r_push_arguments);
+  set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
+  set_gdbarch_push_return_address (gdbarch, m32r_push_return_address);
+  set_gdbarch_reg_struct_has_addr (gdbarch, m32r_reg_struct_has_addr);
+  set_gdbarch_use_struct_convention (gdbarch, m32r_use_struct_convention);
+
+  /* Breakpoints.  */
+  set_gdbarch_decr_pc_after_break (gdbarch, 0);
+  set_gdbarch_function_start_offset (gdbarch, 0);
+  set_gdbarch_breakpoint_from_pc (gdbarch, m32r_breakpoint_from_pc);
+  set_gdbarch_memory_insert_breakpoint (gdbarch, m32r_memory_insert_breakpoint);
+  set_gdbarch_memory_remove_breakpoint (gdbarch, m32r_memory_remove_breakpoint);
+
+  /* Misc.  */
+  set_gdbarch_coerce_float_to_double (gdbarch, standard_coerce_float_to_double);
+
+  return gdbarch;
+}
+
+
 void
 _initialize_m32r_tdep (void)
 {
+  register_gdbarch_init (bfd_arch_m32r, m32r_gdbarch_init);
+
   tm_print_insn = print_insn_m32r;
 }
+
