From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 15412 invoked by alias); 27 May 2003 02:46:14 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 32150 invoked from network); 27 May 2003 02:38:42 -0000 Received: from unknown (HELO mail04.idc.renesas.com) (202.234.163.13) by sources.redhat.com with SMTP; 27 May 2003 02:38:42 -0000 Received: from mail04.idc.renesas.com (localhost [127.0.0.1]) by mail04.idc.renesas.com with ESMTP id h4R2ceNq021028; Tue, 27 May 2003 11:38:40 +0900 (JST) Received: from guardian04.idc.renesas.com ([172.20.8.135]) by mail04.idc.renesas.com with ESMTP id h4R2cdUU021025; Tue, 27 May 2003 11:38:40 +0900 (JST) Received: (from root@localhost) by guardian04.idc.renesas.com with id h4R2cd8A025775; Tue, 27 May 2003 11:38:39 +0900 (JST) Received: from unknown [172.20.8.73] by guardian04.idc.renesas.com with SMTP id MAA25774 ; Tue, 27 May 2003 11:38:39 +0900 Received: from mta05.idc.renesas.com (localhost [127.0.0.1]) by mta05.idc.renesas.com with ESMTP id h4R2cdkK006325; Tue, 27 May 2003 11:38:39 +0900 (JST) Received: from dnma01 ([10.15.2.200]) by mta05.idc.renesas.com with ESMTP id h4R2cc77006322; Tue, 27 May 2003 11:38:38 +0900 (JST) Received: from dnma02 (dnma02.rso.renesas.com [10.15.11.200]) by dnma01.rso.renesas.com (iPlanet Messaging Server 5.2 HotFix 1.12 (built Feb 13 2003)) with ESMTP id <0HFI00F82XXCZ2@dnma01.rso.renesas.com>; Tue, 27 May 2003 11:36:48 +0900 (JST) Received: from t1pcapricot2.hoku.renesas.com ([10.145.105.37]) by dnma02.rso.renesas.com (iPlanet Messaging Server 5.2 HotFix 1.12 (built Feb 13 2003)) with ESMTP id <0HFI00BN5XUUI1@dnma02.rso.renesas.com>; Tue, 27 May 2003 11:35:18 +0900 (JST) Date: Tue, 27 May 2003 02:46:00 -0000 From: Kazuhiro Inaoka Subject: [PATCH] [m32r-elf ] m32r-stub.c compile error with gcc-3.3 To: newlib@sources.redhat.com Cc: gdb-patches@sources.redhat.com Message-id: <003001c323f9$3bdeec80$2569910a@hoku.renesas.com> MIME-version: 1.0 X-MIMEOLE: Produced By Microsoft MimeOLE V5.50.4807.1700 Content-type: multipart/mixed; boundary="Boundary_(ID_G3E5YbpxPVfi9W5mHNZAFQ)" X-Priority: 3 X-MSMail-priority: Normal X-SW-Source: 2003-05/txt/msg00494.txt.bz2 This is a multi-part message in MIME format. --Boundary_(ID_G3E5YbpxPVfi9W5mHNZAFQ) Content-type: text/plain; charset=iso-2022-jp Content-transfer-encoding: 7BIT Content-length: 675 Compiler: gcc-3.3 released Newlib* newlib-1.11.0 released GDB: gcc-5.3 released m32r-elf-gcc -B/home4/inaoka/work/work-org_src/build.newlib-1.11.0/m32r-elf/ newlib/ -isystem /home4/inaoka/work/work-org_src/build.newlib-1.11.0/m32r-elf/newlib/targ-inc lude -isystem /home4/inaoka/work/work-org_src/newlib-1.11.0/newlib/libc/include -c -g -Os -o m32r-stub.o /home4/inaoka/work/work-org_src/newlib-1.11.0/libgloss/m32r/../../gdb/m32r-s tub.c /home4/inaoka/work/work-org_src/newlib-1.11.0/gdb/m32r-stub.c:1199:6: missing terminating " character /home4/inaoka/work/work-org_src/newlib-1.11.0/gdb/m32r-stub.c:1200: error: parse error before "stash_registers" Kazuhiro Inaoka --Boundary_(ID_G3E5YbpxPVfi9W5mHNZAFQ) Content-type: application/octet-stream; name=m32r-stub.c.patch Content-transfer-encoding: quoted-printable Content-disposition: attachment; filename=m32r-stub.c.patch Content-length: 16966 *** m32r-stub.c.org Mon May 26 20:21:02 2003=0A= --- m32r-stub.c Mon May 26 19:52:11 2003=0A= *************** struct PSWreg { /* separate out the bit=0A= *** 1196,1242 ****=0A= Upon entry, all other registers are assumed to have not been modified= =0A= since the interrupt/trap occured. */=0A= =20=20=0A= ! asm ("=0A= ! stash_registers:=0A= ! push r0=0A= ! push r1=0A= ! seth r1, #shigh(registers)=0A= ! add3 r1, r1, #low(registers)=0A= ! pop r0 ; r1=0A= ! st r0, @(4,r1)=0A= ! pop r0 ; r0=0A= ! st r0, @r1=0A= ! addi r1, #4 ; only add 4 as subsequent saves are `pre inc'=0A= ! st r2, @+r1=0A= ! st r3, @+r1=0A= ! st r4, @+r1=0A= ! st r5, @+r1=0A= ! st r6, @+r1=0A= ! st r7, @+r1=0A= ! st r8, @+r1=0A= ! st r9, @+r1=0A= ! st r10, @+r1=0A= ! st r11, @+r1=0A= ! st r12, @+r1=0A= ! st r13, @+r1 ; fp=0A= ! pop r0 ; lr (r14)=0A= ! st r0, @+r1=0A= ! st sp, @+r1 ; sp contains right value at this point=0A= ! mvfc r0, cr0=0A= ! st r0, @+r1 ; cr0 =3D=3D PSW=0A= ! mvfc r0, cr1=0A= ! st r0, @+r1 ; cr1 =3D=3D CBR=0A= ! mvfc r0, cr2=0A= ! st r0, @+r1 ; cr2 =3D=3D SPI=0A= ! mvfc r0, cr3=0A= ! st r0, @+r1 ; cr3 =3D=3D SPU=0A= ! mvfc r0, cr6=0A= ! st r0, @+r1 ; cr6 =3D=3D BPC=0A= ! st r0, @+r1 ; PC =3D=3D BPC=0A= ! mvfaclo r0=0A= ! st r0, @+r1 ; ACCL=0A= ! mvfachi r0=0A= ! st r0, @+r1 ; ACCH=0A= jmp lr");=0A= =20=20=0A= /* C routine to clean up what stash_registers did.=0A= --- 1196,1242 ----=0A= Upon entry, all other registers are assumed to have not been modified= =0A= since the interrupt/trap occured. */=0A= =20=20=0A= ! asm ("\n\=0A= ! stash_registers:\n\=0A= ! push r0\n\=0A= ! push r1\n\=0A= ! seth r1, #shigh(registers)\n\=0A= ! add3 r1, r1, #low(registers)\n\=0A= ! pop r0 ; r1\n\=0A= ! st r0, @(4,r1)\n\=0A= ! pop r0 ; r0\n\=0A= ! st r0, @r1\n\=0A= ! addi r1, #4 ; only add 4 as subsequent saves are `pre inc'\n\=0A= ! st r2, @+r1\n\=0A= ! st r3, @+r1\n\=0A= ! st r4, @+r1\n\=0A= ! st r5, @+r1\n\=0A= ! st r6, @+r1\n\=0A= ! st r7, @+r1\n\=0A= ! st r8, @+r1\n\=0A= ! st r9, @+r1\n\=0A= ! st r10, @+r1\n\=0A= ! st r11, @+r1\n\=0A= ! st r12, @+r1\n\=0A= ! st r13, @+r1 ; fp\n\=0A= ! pop r0 ; lr (r14)\n\=0A= ! st r0, @+r1\n\=0A= ! st sp, @+r1 ; sp contains right value at this point\n\=0A= ! mvfc r0, cr0\n\=0A= ! st r0, @+r1 ; cr0 =3D=3D PSW\n\=0A= ! mvfc r0, cr1\n\=0A= ! st r0, @+r1 ; cr1 =3D=3D CBR\n\=0A= ! mvfc r0, cr2\n\=0A= ! st r0, @+r1 ; cr2 =3D=3D SPI\n\=0A= ! mvfc r0, cr3\n\=0A= ! st r0, @+r1 ; cr3 =3D=3D SPU\n\=0A= ! mvfc r0, cr6\n\=0A= ! st r0, @+r1 ; cr6 =3D=3D BPC\n\=0A= ! st r0, @+r1 ; PC =3D=3D BPC\n\=0A= ! mvfaclo r0\n\=0A= ! st r0, @+r1 ; ACCL\n\=0A= ! mvfachi r0\n\=0A= ! st r0, @+r1 ; ACCH\n\=0A= jmp lr");=0A= =20=20=0A= /* C routine to clean up what stash_registers did.=0A= *************** cleanup_stash (void)=0A= *** 1270,1312 ****=0A= registers[SPI] =3D registers[R15];=0A= }=0A= =20=20=0A= ! asm ("=0A= ! restore_and_return:=0A= ! seth r0, #shigh(registers+8)=0A= ! add3 r0, r0, #low(registers+8)=0A= ! ld r2, @r0+ ; restore r2=0A= ! ld r3, @r0+ ; restore r3=0A= ! ld r4, @r0+ ; restore r4=0A= ! ld r5, @r0+ ; restore r5=0A= ! ld r6, @r0+ ; restore r6=0A= ! ld r7, @r0+ ; restore r7=0A= ! ld r8, @r0+ ; restore r8=0A= ! ld r9, @r0+ ; restore r9=0A= ! ld r10, @r0+ ; restore r10=0A= ! ld r11, @r0+ ; restore r11=0A= ! ld r12, @r0+ ; restore r12=0A= ! ld r13, @r0+ ; restore r13=0A= ! ld r14, @r0+ ; restore r14=0A= ! ld r15, @r0+ ; restore r15=0A= ! ld r1, @r0+ ; restore cr0 =3D=3D PSW=0A= ! mvtc r1, cr0=0A= ! ld r1, @r0+ ; restore cr1 =3D=3D CBR (no-op, because it's read only)=0A= ! mvtc r1, cr1=0A= ! ld r1, @r0+ ; restore cr2 =3D=3D SPI=0A= ! mvtc r1, cr2=0A= ! ld r1, @r0+ ; restore cr3 =3D=3D SPU=0A= ! mvtc r1, cr3=0A= ! addi r0, #4 ; skip BPC=0A= ! ld r1, @r0+ ; restore cr6 (BPC) =3D=3D PC=0A= ! mvtc r1, cr6=0A= ! ld r1, @r0+ ; restore ACCL=0A= ! mvtaclo r1=0A= ! ld r1, @r0+ ; restore ACCH=0A= ! mvtachi r1=0A= ! seth r0, #shigh(registers)=0A= ! add3 r0, r0, #low(registers)=0A= ! ld r1, @(4,r0) ; restore r1=0A= ! ld r0, @r0 ; restore r0=0A= rte");=0A= =20=20=0A= /* General trap handler, called after the registers have been stashed.=0A= --- 1270,1312 ----=0A= registers[SPI] =3D registers[R15];=0A= }=0A= =20=20=0A= ! asm ("\n\=0A= ! restore_and_return:\n\=0A= ! seth r0, #shigh(registers+8)\n\=0A= ! add3 r0, r0, #low(registers+8)\n\=0A= ! ld r2, @r0+ ; restore r2\n\=0A= ! ld r3, @r0+ ; restore r3\n\=0A= ! ld r4, @r0+ ; restore r4\n\=0A= ! ld r5, @r0+ ; restore r5\n\=0A= ! ld r6, @r0+ ; restore r6\n\=0A= ! ld r7, @r0+ ; restore r7\n\=0A= ! ld r8, @r0+ ; restore r8\n\=0A= ! ld r9, @r0+ ; restore r9\n\=0A= ! ld r10, @r0+ ; restore r10\n\=0A= ! ld r11, @r0+ ; restore r11\n\=0A= ! ld r12, @r0+ ; restore r12\n\=0A= ! ld r13, @r0+ ; restore r13\n\=0A= ! ld r14, @r0+ ; restore r14\n\=0A= ! ld r15, @r0+ ; restore r15\n\=0A= ! ld r1, @r0+ ; restore cr0 =3D=3D PSW\n\=0A= ! mvtc r1, cr0\n\=0A= ! ld r1, @r0+ ; restore cr1 =3D=3D CBR (no-op, because it's read only)\n\= =0A= ! mvtc r1, cr1\n\=0A= ! ld r1, @r0+ ; restore cr2 =3D=3D SPI\n\=0A= ! mvtc r1, cr2\n\=0A= ! ld r1, @r0+ ; restore cr3 =3D=3D SPU\n\=0A= ! mvtc r1, cr3\n\=0A= ! addi r0, #4 ; skip BPC\n\=0A= ! ld r1, @r0+ ; restore cr6 (BPC) =3D=3D PC\n\=0A= ! mvtc r1, cr6\n\=0A= ! ld r1, @r0+ ; restore ACCL\n\=0A= ! mvtaclo r1\n\=0A= ! ld r1, @r0+ ; restore ACCH\n\=0A= ! mvtachi r1\n\=0A= ! seth r0, #shigh(registers)\n\=0A= ! add3 r0, r0, #low(registers)\n\=0A= ! ld r1, @(4,r0) ; restore r1\n\=0A= ! ld r0, @r0 ; restore r0\n\=0A= rte");=0A= =20=20=0A= /* General trap handler, called after the registers have been stashed.=0A= *************** static void=0A= *** 1316,1519 ****=0A= process_exception (int num)=0A= {=0A= cleanup_stash ();=0A= ! asm volatile ("=0A= ! seth r1, #shigh(stackPtr)=0A= ! add3 r1, r1, #low(stackPtr)=0A= ! ld r15, @r1 ; setup local stack (protect user stack)=0A= ! mv r0, %0=0A= ! bl handle_exception=0A= bl restore_and_return"=0A= : : "r" (num) : "r0", "r1");=0A= }=0A= =20=20=0A= void _catchException0 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException0:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #0=0A= bl process_exception");=0A= =20=20=0A= void _catchException1 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException1:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! bl cleanup_stash=0A= ! seth r1, #shigh(stackPtr)=0A= ! add3 r1, r1, #low(stackPtr)=0A= ! ld r15, @r1 ; setup local stack (protect user stack)=0A= ! seth r1, #shigh(registers + 21*4) ; PC=0A= ! add3 r1, r1, #low(registers + 21*4)=0A= ! ld r0, @r1=0A= ! addi r0, #-4 ; back up PC for breakpoint trap.=0A= ! st r0, @r1 ; FIXME: what about bp in right slot?=0A= ! ldi r0, #1=0A= ! bl handle_exception=0A= bl restore_and_return");=0A= =20=20=0A= void _catchException2 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException2:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #2=0A= bl process_exception");=0A= =20=20=0A= void _catchException3 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException3:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #3=0A= bl process_exception");=0A= =20=20=0A= void _catchException4 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException4:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #4=0A= bl process_exception");=0A= =20=20=0A= void _catchException5 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException5:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #5=0A= bl process_exception");=0A= =20=20=0A= void _catchException6 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException6:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #6=0A= bl process_exception");=0A= =20=20=0A= void _catchException7 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException7:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #7=0A= bl process_exception");=0A= =20=20=0A= void _catchException8 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException8:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #8=0A= bl process_exception");=0A= =20=20=0A= void _catchException9 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException9:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #9=0A= bl process_exception");=0A= =20=20=0A= void _catchException10 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException10:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #10=0A= bl process_exception");=0A= =20=20=0A= void _catchException11 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException11:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #11=0A= bl process_exception");=0A= =20=20=0A= void _catchException12 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException12:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #12=0A= bl process_exception");=0A= =20=20=0A= void _catchException13 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException13:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #13=0A= bl process_exception");=0A= =20=20=0A= void _catchException14 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException14:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #14=0A= bl process_exception");=0A= =20=20=0A= void _catchException15 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException15:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #15=0A= bl process_exception");=0A= =20=20=0A= void _catchException16 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException16:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #16=0A= bl process_exception");=0A= =20=20=0A= void _catchException17 ();=0A= =20=20=0A= ! asm ("=0A= ! _catchException17:=0A= ! push lr=0A= ! bl stash_registers=0A= ! ; Note that at this point the pushed value of `lr' has been popped=0A= ! ldi r0, #17=0A= bl process_exception");=0A= =20=20=0A= =20=20=0A= --- 1316,1519 ----=0A= process_exception (int num)=0A= {=0A= cleanup_stash ();=0A= ! asm volatile ("\n\=0A= ! seth r1, #shigh(stackPtr)\n\=0A= ! add3 r1, r1, #low(stackPtr)\n\=0A= ! ld r15, @r1 ; setup local stack (protect user stack)\n\=0A= ! mv r0, %0\n\=0A= ! bl handle_exception\n\=0A= bl restore_and_return"=0A= : : "r" (num) : "r0", "r1");=0A= }=0A= =20=20=0A= void _catchException0 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException0:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #0\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException1 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException1:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! bl cleanup_stash\n\=0A= ! seth r1, #shigh(stackPtr)\n\=0A= ! add3 r1, r1, #low(stackPtr)\n\=0A= ! ld r15, @r1 ; setup local stack (protect user stack)\n\=0A= ! seth r1, #shigh(registers + 21*4) ; PC\n\=0A= ! add3 r1, r1, #low(registers + 21*4)\n\=0A= ! ld r0, @r1\n\=0A= ! addi r0, #-4 ; back up PC for breakpoint trap.\n\=0A= ! st r0, @r1 ; FIXME: what about bp in right slot?\n\=0A= ! ldi r0, #1\n\=0A= ! bl handle_exception\n\=0A= bl restore_and_return");=0A= =20=20=0A= void _catchException2 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException2:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #2\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException3 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException3:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #3\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException4 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException4:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #4\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException5 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException5:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #5\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException6 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException6:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #6\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException7 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException7:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #7\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException8 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException8:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #8\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException9 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException9:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #9\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException10 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException10:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #10\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException11 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException11:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #11\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException12 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException12:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #12\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException13 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException13:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #13\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException14 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException14:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #14\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException15 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException15:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #15\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException16 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException16:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #16\n\=0A= bl process_exception");=0A= =20=20=0A= void _catchException17 ();=0A= =20=20=0A= ! asm ("\n\=0A= ! _catchException17:\n\=0A= ! push lr\n\=0A= ! bl stash_registers\n\=0A= ! ; Note that at this point the pushed value of `lr' has been popped\n\=0A= ! ldi r0, #17\n\=0A= bl process_exception");=0A= =20=20=0A= =20=20=0A= --Boundary_(ID_G3E5YbpxPVfi9W5mHNZAFQ)--